[U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register

Nishanth Menon
2015-04-10T05:45:02Z

On 21:35-20150409, Fabio Estevam wrote:
> Hi Nishanth,
>
> On Thu, Mar 12, 2015 at 12:34 PM, Nishanth Menon <nm@ti.com> wrote:
>
> > Maybe the following can help? (reposting)
> > http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/214436
>
> It seems you are in a better position to provide such generic solution :-)
>
> Do you plan to work on it?
>
I had'nt originally planned on working on it, but then with OMAP4(pl310 base 0x48242000) and AM437x(pl310 base 0x48242000) both using A9, I am a little curious as well.. and probably can give it a shot.. but, I'd probably need a lil more info.

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0246e/Beifcidc.html
bit 22 is Shared attribute override enable

I quickly tried to get my hands on PL310 erratum doc and the best I
could get my hands on to was Document Revision: 14.1 (10-Apr-2012)
- not really the latest and for whatever reason, I can find this in
there :( - Does anyone have the erratum number for this? I can try
and get the latest erratum doc once normal human hours start back at
work..

Anyways.. here is a build tested diff as a proposal.. quickly wrote up
in the last 30 mins or so and only build tested(OMAP4 only).. wont bet my car on
ir... but anyways.. since folks wanted an illustration..

Here are the good parts.. for imx, you probably wont have to override
the weak function pl310_write_aux_ctrl and you will function happily,
I can override it for AM437x and OMAP4 based on the secure call needed
and we will both flow the same path in the logic. Ofcourse, currently
pl310.c is not being built for SPL.. we could fix that ofcourse.. I
did not attempt to do that in this diff - just hacked around it..

bad part is as follows: unlike the kernel where the default is
expected to be write_sec, we assume direct non-secure access will
probably work.. but then, that should be properly evaluated.

If you guys want to take the following approach to it's logical
conclusion, please feel free.. I wont probably get time to dig at this
given my current work obligations :( I can however help patch up/test
OMAP4/AM437x as needed (I think I can make some time out for that..)

btw, something nice to do would be to extend this with proper
abstraction so that we can do something like the write_sec that the
kernel does today - instead of register specific access.. but on the
flip side, register specific functions lets us skip case like code to
handle the various register accesses.. anyways... we can always figure
that out if needed...

Hope this helps..
diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c
index 9792761d40a0..b1841a060b66 100644
--- a/arch/arm/cpu/armv7/omap4/hwinit.c
+++ b/arch/arm/cpu/armv7/omap4/hwinit.c
@@ -19,6 +19,7 @@
#include <asm/emif.h>
#include <asm/arch/gpio.h>
#include <asm/omap_common.h>
+#include <asm/pl310.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -35,6 +36,13 @@ static const struct gpio_bank gpio_bank_44xx[6] = {

const struct gpio_bank *const omap_gpio_bank = gpio_bank_44xx;

+#ifndef CONFIG_SPL_BUILD
+void pl310_write_aux_ctrl(u32 aux_ctrl)
+{
+ omap_smc1(OMAP4_SERVICE_PL310_AUXCTRL_REG_SET, aux_ctrl);
+}
+#endif
+
#ifdef CONFIG_SPL_BUILD
/*
* Some tuning of IOs for optimal power and performance
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 5ed0f45a2661..4608c0503463 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -227,6 +227,10 @@ skip_errata_430973:
skip_errata_621766:
#endif

+#ifdef CONFIG_SYS_L2_PL310
+ bl pl310_erratum_implement
+#endif /* CONFIG_SYS_L2_PL310 */
+
mov pc, r5 @ back to my caller
ENDPROC(cpu_init_cp15)

diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index f30f86539130..db0fca3b3f7f 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -58,5 +58,6 @@ void force_emif_self_refresh(void);
void setup_warmreset_time(void);

#define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102
+#define OMAP4_SERVICE_PL310_AUXCTRL_REG_SET 0x109

#endif
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index 58d8b161215a..8ee14934ede7 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -142,6 +142,7 @@ void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
u32 cpu_rev);
void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
u32 cpu_variant, u32 cpu_rev);
+void pl310_erratum_implement(void);
#endif /* ! __ASSEMBLY__ */

#endif
diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h
index ddc245bfd559..d0955d0ae762 100644
--- a/arch/arm/include/asm/pl310.h
+++ b/arch/arm/include/asm/pl310.h
@@ -12,6 +12,7 @@

/* Register bit fields */
#define PL310_AUX_CTRL_ASSOCIATIVITY_MASK (1 << 16)
+#define PL310_AUX_CTRL_SHARED_ATTRIB_OVERRIDE_EN (1 << 22)
#define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1)
#define L2X0_STNDBY_MODE_EN (1 << 0)
#define L2X0_CTRL_EN 1
@@ -74,5 +75,6 @@ void pl310_inval_all(void);
void pl310_clean_inval_all(void);
void pl310_inval_range(u32 start, u32 end);
void pl310_clean_inval_range(u32 start, u32 end);
+void pl310_write_aux_ctrl(u32 aux_ctrl);

#endif
diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c
index 1ad1f8aea085..d0cc7d8295c8 100644
--- a/arch/arm/lib/cache-pl310.c
+++ b/arch/arm/lib/cache-pl310.c
@@ -14,6 +14,21 @@

struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE;

+/* Override in platform code based on secure access needs */
+void __weak pl310_write_aux_ctrl(u32 aux_ctrl)
+{
+ writel(aux_ctrl, &pl310->pl310_aux_ctrl);
+}
+
+void pl310_erratum_implement(void)
+{
+ u32 __maybe_unused reg = 0;
+#ifdef CONFIG_ARM_PL310_ERRATA_xyz
+ reg = readl(&pl310->pl310_aux_ctrl);
+ pl310_write_aux_ctrl(reg | PL310_AUX_CTRL_SHARED_ATTRIB_OVERRIDE_EN);
+#endif
+}
+
static void pl310_cache_sync(void)
{
writel(0, &pl310->pl310_cache_sync);
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 1c93aab1a7d7..765ceef000aa 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -23,9 +23,10 @@

#define CONFIG_SYS_THUMB_BUILD

-#ifndef CONFIG_SYS_L2CACHE_OFF
+#if !defined(CONFIG_SYS_L2CACHE_OFF) && !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_L2_PL310 1
#define CONFIG_SYS_PL310_BASE 0x48242000
+#define CONFIG_ARM_PL310_ERRATA_xyz
#endif
#define CONFIG_SYS_CACHELINE_SIZE 32

--
Regards,
Nishanth Menon