From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Schocher Date: Tue, 17 Mar 2015 09:10:12 +0100 Subject: [U-Boot] [PATCH 1/4] ARM: atmel: arm926ejs: fix clock configuration In-Reply-To: <5507DE95.3010200@atmel.com> References: <1426238380-28958-1-git-send-email-voice.shen@atmel.com> <1426238380-28958-2-git-send-email-voice.shen@atmel.com> <5507DB8C.9010204@denx.de> <5507DE95.3010200@atmel.com> Message-ID: <5507E164.5000401@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello Bo, Am 17.03.2015 08:58, schrieb Bo Shen: > Hi Heiko, > > On 03/17/2015 03:45 PM, Heiko Schocher wrote: >> Hello Bo, >> >> Am 13.03.2015 10:19, schrieb Bo Shen: >>> Config MCKR according to the datasheet sequence, or else it >>> will cause the MCKR configuration failed. >>> >>> Remove timeout checking for clock configuration, if configure >>> the clock failed, let the system hang while not run in wrong >>> clock configuration. >>> >>> Signed-off-by: Bo Shen >>> --- >>> >>> arch/arm/mach-at91/arm926ejs/clock.c | 54 >>> +++++++++++++++++++----------------- >>> 1 file changed, 28 insertions(+), 26 deletions(-) >> >> Tested on the corvus and taurus board. >> >> Tested-by: Heiko Schocher > > Thanks. > >>> diff --git a/arch/arm/mach-at91/arm926ejs/clock.c >>> b/arch/arm/mach-at91/arm926ejs/clock.c >>> index f363982..8d6934e 100644 >>> --- a/arch/arm/mach-at91/arm926ejs/clock.c >>> +++ b/arch/arm/mach-at91/arm926ejs/clock.c >>> @@ -195,50 +195,52 @@ int at91_clock_init(unsigned long main_clock) >>> void at91_plla_init(u32 pllar) >>> { >>> struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; >>> - int timeout = AT91_PLL_LOCK_TIMEOUT; >>> >>> writel(pllar, &pmc->pllar); >>> - while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY))) { >>> - timeout--; >>> - if (timeout == 0) >>> - break; >>> - } >>> + while (!(readl(&pmc->sr) & AT91_PMC_LOCKA)) >>> + ; >> >> just hanging is maybe also bad ... could we hang with adding a >> >> if (timeout == 0) { >> debug("could not set PLL(A|B)\n"); >> timeout = AT91_PLL_LOCK_TIMEOUT; >> } >> >> Thinking about it ... have we setup here the debug uart already? >> If not, forget my comment > > Yes the uart is not ready. And one more thing, if the clock is not setup correctly, then the system will run in abnormal status. So, I remove the timeout check here. Ok, thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany