From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Thu, 19 Mar 2015 11:16:25 -0700
Subject: [U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock
 source
In-Reply-To: <20150319180857.GG10153@leverpostej>
References: <1426783559-26610-1-git-send-email-yorksun@freescale.com>
 <1426783559-26610-4-git-send-email-yorksun@freescale.com>
 <20150319180857.GG10153@leverpostej>
Message-ID: <550B1279.4060507@freescale.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 03/19/2015 11:08 AM, Mark Rutland wrote:
>> +
>> +int timer_init(void)
>> +{
>> +	u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
>> +	u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
>> +#ifdef COUNTER_FREQUENCY_REAL
>> +	unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
>> +
>> +	/* Update with accurate clock frequency */
>> +	asm volatile("msr cntfrq_el0, %0" : : "r" (cntfrq) : "memory");
>> +#endif
> 
> Is this executed on all CPUs, or do secondary CPUs have CNTFRQ
> programmed with the correct value elsewhere?
> 

Only the primary CPU runs here. The secondary CPU doesn't come here.

York