From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Thu, 19 Mar 2015 11:24:10 -0700 Subject: [U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock source In-Reply-To: <20150319181752.GI10153@leverpostej> References: <1426783559-26610-1-git-send-email-yorksun@freescale.com> <1426783559-26610-4-git-send-email-yorksun@freescale.com> <20150319180857.GG10153@leverpostej> <550B1279.4060507@freescale.com> <20150319181752.GI10153@leverpostej> Message-ID: <550B144A.8070800@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 03/19/2015 11:17 AM, Mark Rutland wrote: > On Thu, Mar 19, 2015 at 06:16:25PM +0000, York Sun wrote: >> On 03/19/2015 11:08 AM, Mark Rutland wrote: >>>> + >>>> +int timer_init(void) >>>> +{ >>>> + u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR; >>>> + u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR; >>>> +#ifdef COUNTER_FREQUENCY_REAL >>>> + unsigned long cntfrq = COUNTER_FREQUENCY_REAL; >>>> + >>>> + /* Update with accurate clock frequency */ >>>> + asm volatile("msr cntfrq_el0, %0" : : "r" (cntfrq) : "memory"); >>>> +#endif >>> >>> Is this executed on all CPUs, or do secondary CPUs have CNTFRQ >>> programmed with the correct value elsewhere? >>> >> >> Only the primary CPU runs here. The secondary CPU doesn't come here. > > Ok. Where does CNTFRQ get programmed for those CPUs? > > If it's necessary to write COUNTER_FREQUENCY_REAL to the primary CPU's > CNTFRQ, that's also necessary on the secondaries before they enter the > OS. Hmm, this may be a bug. Didn't hear any complain from Linux users. We found the timer wasn't correct during bring-up. Let me check with internal team. Thanks, Mark. York