[U-Boot] [PATCH 28/28] armv8/fsl-lsch3: Implement workaround for I2C issue

[Heiko Schocher <hs@denx.de>]

Hello York,

Am 19.03.2015 17:45, schrieb York Sun:
> This erratum requires setting GLITCH_EN bit in debug register.
>
> Signed-off-by: York Sun <yorksun@freescale.com>
> ---
>   arch/arm/cpu/armv8/fsl-lsch3/soc.c |   30 ++++++++++++++++++++++++++++++
>   1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/cpu/armv8/fsl-lsch3/soc.c b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
> index ca00108..4d9df20 100644
> --- a/arch/arm/cpu/armv8/fsl-lsch3/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
> @@ -37,11 +37,41 @@ static void erratum_rcw_src(void)
>   #endif
>   }
>
> +#define I2C_DEBUG_REG 0x6
> +#define I2C_GLITCH_EN 0x8
> +static void erratum_i2c(void)

Could you add here a short comment, where to find some info
about this erratum? Thanks!

> +{
> +	u8 __iomem *ptr;
> +#ifdef CONFIG_SYS_I2C
> +#ifdef I2C1_BASE_ADDR
> +	ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);

using a struct here would be nicer ...

bye,
Heiko
> +
> +	writeb(I2C_GLITCH_EN, ptr);
> +#endif
> +#ifdef I2C2_BASE_ADDR
> +	ptr = (u8 __iomem *)(I2C2_BASE_ADDR + I2C_DEBUG_REG);
> +
> +	writeb(I2C_GLITCH_EN, ptr);
> +#endif
> +#ifdef I2C3_BASE_ADDR
> +	ptr = (u8 __iomem *)(I2C3_BASE_ADDR + I2C_DEBUG_REG);
> +
> +	writeb(I2C_GLITCH_EN, ptr);
> +#endif
> +#ifdef I2C4_BASE_ADDR
> +	ptr = (u8 __iomem *)(I2C4_BASE_ADDR + I2C_DEBUG_REG);
> +
> +	writeb(I2C_GLITCH_EN, ptr);
> +#endif
> +#endif
> +}
> +
>   void fsl_lsch3_early_init_f(void)
>   {
>   	erratum_a008751();
>   	erratum_rcw_src();
>   	init_early_memctl_regs();	/* tighten IFC timing */
> +	erratum_i2c();
>   }
>
>   #ifdef CONFIG_SPL_BUILD
>

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