[U-Boot] [PATCH 28/28] armv8/fsl-lsch3: Implement workaround for I2C issue

[York Sun <yorksun@freescale.com>]

On 03/19/2015 10:35 PM, Heiko Schocher wrote:
> Hello York,
> 
> Am 19.03.2015 17:45, schrieb York Sun:
>> This erratum requires setting GLITCH_EN bit in debug register.
>>
>> Signed-off-by: York Sun <yorksun@freescale.com>
>> ---
>>   arch/arm/cpu/armv8/fsl-lsch3/soc.c |   30 ++++++++++++++++++++++++++++++
>>   1 file changed, 30 insertions(+)
>>
>> diff --git a/arch/arm/cpu/armv8/fsl-lsch3/soc.c b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
>> index ca00108..4d9df20 100644
>> --- a/arch/arm/cpu/armv8/fsl-lsch3/soc.c
>> +++ b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
>> @@ -37,11 +37,41 @@ static void erratum_rcw_src(void)
>>   #endif
>>   }
>>
>> +#define I2C_DEBUG_REG 0x6
>> +#define I2C_GLITCH_EN 0x8
>> +static void erratum_i2c(void)
> 
> Could you add here a short comment, where to find some info
> about this erratum? Thanks!

Sure I can add some comment. I am still waiting for design team to finalize the
document so users can access. The purpose of posting this patch now is to help
users to overcome this issue as boards are being shipped out.

> 
>> +{
>> +	u8 __iomem *ptr;
>> +#ifdef CONFIG_SYS_I2C
>> +#ifdef I2C1_BASE_ADDR
>> +	ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
> 
> using a struct here would be nicer ...
> 

I agree it would look better. But my concern is this debug register is new and
only exists on this SoC. Since I am reusing the driver, I am reluctant to add
this register for the purpose of the workaround.

York