From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Fri, 20 Mar 2015 10:26:12 -0600 Subject: [U-Boot] [PATCH 2/6] ARM: tegra: Disable SPL and non-cached memory on 64-bit In-Reply-To: <1426854262-1248-2-git-send-email-thierry.reding@gmail.com> References: <1426854262-1248-1-git-send-email-thierry.reding@gmail.com> <1426854262-1248-2-git-send-email-thierry.reding@gmail.com> Message-ID: <550C4A24.4020602@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 03/20/2015 06:24 AM, Thierry Reding wrote: > From: Thierry Reding > > For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in > AArch64 mode so that we don't need the SPL. Non-cached memory is not > implemented (yet) for 64-bit ARM. > diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h > +#ifndef CONFIG_ARM64 > #ifndef CONFIG_SPL_BUILD > #define CONFIG_USE_ARCH_MEMCPY > #endif > +#endif We don't need SPL, but that stanza used to enable ARCH_MEMCPY *except* for SPL. I would expect we still want ARCH_MEMCPY on ARM64, where presumably ifndef CONFIG_SPL_BUILD will always be true?