From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Date: Fri, 20 Mar 2015 18:18:37 +0000 Subject: [U-Boot] [PATCH 6/6] armv8: Allow SoCs to override the generic timer In-Reply-To: <1426852073-10299-6-git-send-email-thierry.reding@gmail.com> References: <1426852073-10299-1-git-send-email-thierry.reding@gmail.com> <1426852073-10299-6-git-send-email-thierry.reding@gmail.com> Message-ID: <550C647D.5040109@arm.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 20/03/15 11:47, Thierry Reding wrote: > From: Thierry Reding > > Some SoCs come with a custom timer interface, so allow them to use that > instead. > > Cc: Albert Aribaud > Cc: Marc Zyngier > Signed-off-by: Thierry Reding > --- > arch/arm/cpu/armv8/generic_timer.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c > index 223b95e210ed..ab8573fc7cef 100644 > --- a/arch/arm/cpu/armv8/generic_timer.c > +++ b/arch/arm/cpu/armv8/generic_timer.c > @@ -9,6 +9,7 @@ > #include > #include > > +#ifndef CONFIG_SYS_TIMER_COUNTER > /* > * Generic timer implementation of get_tbclk() > */ > @@ -29,3 +30,4 @@ unsigned long timer_read_counter(void) > asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct)); > return cntpct; > } > +#endif > Does it mean that in this case, the generic timers are not in a working state? For ARMv8, it would make a lot more sense to make sure that the basic CPU stuff is actually in a working state, and avoid the madness that we have on ARMv7... Thanks, M. -- Jazz is not dead. It just smells funny...