From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Tue, 24 Mar 2015 12:55:23 -0700 Subject: [U-Boot] [PATCH v8 24/28] armv8/ls2085aqds: NAND boot support In-Reply-To: <1427226596.22867.63.camel@freescale.com> References: <1427226456-3944-1-git-send-email-yorksun@freescale.com> <1427226596.22867.63.camel@freescale.com> Message-ID: <5511C12B.6070202@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 03/24/2015 12:49 PM, Scott Wood wrote: > On Tue, 2015-03-24 at 12:47 -0700, York Sun wrote: >> +Booting from NAND >> +------------------- >> +Booting from NAND requires two images, RCW and u-boot-with-spl.bin. >> +The difference between NAND boot RCW image and NOR boot image is the PBI >> +command sequence. Below is one example for PBI commands for QDS. >> + >> +1) CCSR 4-byte write to 0x00e00404, data=0x00000000 >> +2) CCSR 4-byte write to 0x00e00400, data=0x1800a000 >> +The above two commands set bootloc register to 0x00000000_1800a000 where >> +the u-boot code will be running in OCRAM. >> + >> +3) Block Copy: SRC=0x0107, SRC_ADDR=0x00100000, DEST_ADDR=0x1800a000, >> +BLOCK_SIZE=0x00014000 >> +This command copies u-boot image from NAND device into OCRAM. The values need >> +to adjust accordingly. >> + >> +SRC should match the cfg_rcw_src, the reset config pins. It depends >> + on the NAND device. See reference manual for cfg_rcw_src. >> +SRC_ADDR is the offset of u-boot image in NAND device. It should match >> + CONFIG_SYS_NAND_U_BOOT_OFFS. In the example above, it is 1MB. > > Why 1 MiB? > I got it wrong. I though the erase size is 1MB, but actually it is 128KB. I will fix it. York