From mboxrd@z Thu Jan  1 00:00:00 1970
From: Dinh Nguyen <dinh.linux@gmail.com>
Date: Tue, 31 Mar 2015 15:59:11 -0500
Subject: [U-Boot] [PATCHv3 17/17] arm: socfpga: fix uart0 pin mux
	configuration
In-Reply-To: <20150331204809.GB9785@amd>
References: <1427752878-18426-1-git-send-email-dinguyen@opensource.altera.com>
 <1427752878-18426-18-git-send-email-dinguyen@opensource.altera.com>
 <20150331204809.GB9785@amd>
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On 3/31/15 3:48 PM, Pavel Machek wrote:
> On Mon 2015-03-30 17:01:18, dinguyen at opensource.altera.com wrote:
>> From: Dinh Nguyen <dinguyen@opensource.altera.com>
>>
>> commit "07d30b6c3129 arm: socfpga: Sync Cyclone V DK pinmux configuration"
>> incorrectly set the muxing for UART0 on the Cyclone V DK.
>>
>> This fixes it up so UART0 is working again.
>>
>> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> 
> Acked-by: Pavel Machek <pavel@ucw.cz>
> 
> But I guess this one should be merged ahead of the rest of series...?
> 
> 									Pavel
Yes, this patch should get merged without the SPL.

Dinh