From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Mon, 13 Apr 2015 09:33:25 -0700
Subject: [U-Boot] [PATCH 1/2][v6] powerpc/mpc85xx: SECURE BOOT- NAND
 secure boot target for P3041
In-Reply-To: <1425541084-5481-1-git-send-email-aneesh.bansal@freescale.com>
References: <1425541084-5481-1-git-send-email-aneesh.bansal@freescale.com>
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To: u-boot@lists.denx.de

Aneesh,

On 03/04/2015 11:38 PM, Aneesh Bansal wrote:
> Secure Boot Target is added for NAND for P3041.
> Changes:
> In PowerPC, the core begins execution from address 0xFFFFFFFC.
> In case of secure boot, this default address maps to Boot ROM.
> The Boot ROM code requires that the bootloader(U-boot) must lie
> in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF.
> 
> In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is
> configured as SRAM. U-Boot binary will be located on this SRAM at
> location 0xBFF40000 with entry point as 0xBFFFFFFC.
> 
> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
> ---
> Changes in v6:
> Changed the version in Patchset.
> 

Are we closed on this patch discussion? I see open discussion for v4 patch after
you posted v6.

York