From mboxrd@z Thu Jan  1 00:00:00 1970
From: Dinh Nguyen <dinguyen@opensource.altera.com>
Date: Wed, 15 Apr 2015 15:49:11 -0500
Subject: [U-Boot] [PATCHv3 15/17] arm: socfpga: spl: update pll_config
 for dev kit
In-Reply-To: <201504030354.44106.marex@denx.de>
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 <201504030354.44106.marex@denx.de>
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On 04/02/2015 08:54 PM, Marek Vasut wrote:
> On Tuesday, March 31, 2015 at 12:01:16 AM, dinguyen at opensource.altera.com wrote:
>> From: Dinh Nguyen <dinguyen@opensource.altera.com>
>>
>> This sets the CPU clocks to 925MHz and DDR to 400MHz, and the correct
>> CONFIG_HPS_MAINPLLGRP_VCO_NUMER should be 79.
> 
> Didn't various CV SX run at 800MHz only ? I think only some of them ran
> at 925MHz, not all of them.
> 

Ah yes, I think I'm lucky to have a 925MHz devkit on my desk. But I
think CONFIG_HPS_MAINPLLGRP_VCO_NUMER should be 79, as I cannot get a
correct baudrate without it.

Dinh