[U-Boot] [PATCH] mx5 iomux: Fix GPIO with SION

["Benoît Thébaudeau" <benoit.thebaudeau@advansee.com>]

IOMUX_CONFIG_GPIO may be used together with IOMUX_CONFIG_SION, so don't break
the iomux function value set to the register in this case.

Define the value of IOMUX_CONFIG_GPIO in a way showing that it should have
only 1 bit set.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 .../arch/arm/cpu/armv7/mx5/iomux.c                 |    5 +++--
 .../arch/arm/include/asm/arch-mx5/iomux.h          |    2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git u-boot-4d3c95f.orig/arch/arm/cpu/armv7/mx5/iomux.c u-boot-4d3c95f/arch/arm/cpu/armv7/mx5/iomux.c
index d4e3bbb..7adf08f 100644
--- u-boot-4d3c95f.orig/arch/arm/cpu/armv7/mx5/iomux.c
+++ u-boot-4d3c95f/arch/arm/cpu/armv7/mx5/iomux.c
@@ -124,8 +124,9 @@ static void iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
 
 	if ((mux_reg > get_mux_end()) || (mux_reg < IOMUXSW_MUX_CTL))
 		return ;
-	if (cfg == IOMUX_CONFIG_GPIO)
-		writel(PIN_TO_ALT_GPIO(pin), mux_reg);
+	if (cfg & IOMUX_CONFIG_GPIO)
+		writel((cfg & ~IOMUX_CONFIG_GPIO) | PIN_TO_ALT_GPIO(pin),
+			mux_reg);
 	else
 		writel(cfg, mux_reg);
 }
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx5/iomux.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx5/iomux.h
index e3765a3..8b6e56a 100644
--- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx5/iomux.h
+++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx5/iomux.h
@@ -40,7 +40,7 @@ typedef enum iomux_config {
 	IOMUX_CONFIG_ALT5,	/*!< used as alternate function 5 */
 	IOMUX_CONFIG_ALT6,	/*!< used as alternate function 6 */
 	IOMUX_CONFIG_ALT7,	/*!< used as alternate function 7 */
-	IOMUX_CONFIG_GPIO,	/*!< added to help user use GPIO mode */
+	IOMUX_CONFIG_GPIO = 0x1 << 3,	/*!< added to help user use GPIO mode */
 	IOMUX_CONFIG_SION = 0x1 << 4,	/*!< used as LOOPBACK:MUX SION bit */
 } iomux_pin_cfg_t;