[U-Boot] [PATCH 1/4] imx: mx6: display max cpu frequency in print_cpuinfo()

[Markus Niebel <list-09_u-boot@tqsc.de>]

Hello Tim,

Am 28.04.2015 um 17:44 schrieb Tim Harvey:
> The IMX6 has four different speed grades determined by eFUSE SPEED_GRADING
> (OCOTP_CFG3[17:16]).
> 
> Display this value to make it clear the difference regarding the CPU speed
> currently running at vs the max speed allowed per grade. Note that the power
> on CPU speed is determined by OCOTP_CFG4[18].
> 
> I see no indication in the IMX6SX reference manual that it has the same CPU
> speed grades in this OTP register.
> 

AFAIK there is no speed grading info for i.MX6 Solo / DualLight in OTP. 

> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  arch/arm/cpu/armv7/mx6/soc.c              | 26 ++++++++++++++++++++++++++
>  arch/arm/imx-common/cpu.c                 | 17 +++++++++++++++++
>  arch/arm/include/asm/arch-mx6/sys_proto.h |  1 +
>  arch/arm/include/asm/proc                 |  1 +
>  4 files changed, 45 insertions(+)
>  create mode 120000 arch/arm/include/asm/proc
> 
> diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
> index dd34138..dc422a6 100644
> --- a/arch/arm/cpu/armv7/mx6/soc.c
> +++ b/arch/arm/cpu/armv7/mx6/soc.c
> @@ -83,6 +83,32 @@ u32 get_cpu_rev(void)
>  	return (type << 12) | (reg + 0x10);
>  }
>  
> +#define OCOTP_CFG3_SPEED_SHIFT          16
> +#define OCOTP_CFG3_SPEED_1P2GHZ         0x3
> +#define OCOTP_CFG3_SPEED_996MHZ         0x2
> +#define OCOTP_CFG3_SPEED_852MHZ         0x1
> +
> +u32 get_cpu_speed_grade_hz(void)
> +{
> +	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
> +	struct fuse_bank *bank = &ocotp->bank[0];
> +	struct fuse_bank0_regs *fuse =
> +		(struct fuse_bank0_regs *)bank->fuse_regs;
> +	uint32_t val;
> +
> +	val = readl(&fuse->cfg3);
> +	val >>= OCOTP_CFG3_SPEED_SHIFT;
> +	val &= 0x3;
> +
> +	if (val == OCOTP_CFG3_SPEED_1P2GHZ)
> +		return 1200000000;
> +	if (val == OCOTP_CFG3_SPEED_996MHZ)
> +		return 996000000;
> +	if (val == OCOTP_CFG3_SPEED_852MHZ)
> +		return 852000000;
> +	return 792000000;
> +}
> +
>  #ifdef CONFIG_REVISION_TAG
>  u32 __weak get_board_rev(void)
>  {
> diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
> index 067d08f..ead7f08 100644
> --- a/arch/arm/imx-common/cpu.c
> +++ b/arch/arm/imx-common/cpu.c
> @@ -151,11 +151,28 @@ int print_cpuinfo(void)
>  
>  	cpurev = get_cpu_rev();
>  
> +#if defined(CONFIG_MX6)
> +	printf("CPU:   Freescale i.MX%s rev%d.%d",
> +		get_imx_type((cpurev & 0xFF000) >> 12),
> +		(cpurev & 0x000F0) >> 4,
> +		(cpurev & 0x0000F) >> 0);
> +	if (is_cpu_type(MXC_CPU_MX6SX))
> +		printf(" at %d MHz", mxc_get_clock(MXC_ARM_CLK) / 1000000);
> +	else {
> +		printf(" %d MHz", get_cpu_speed_grade_hz() / 1000000);
> +		if (get_cpu_speed_grade_hz() != mxc_get_clock(MXC_ARM_CLK)) {
> +			printf(" (at %d MHz)",
> +			       mxc_get_clock(MXC_ARM_CLK) / 1000000);
> +		}
> +	}
> +	puts("\n");
> +#else
>  	printf("CPU:   Freescale i.MX%s rev%d.%d at %d MHz\n",
>  		get_imx_type((cpurev & 0xFF000) >> 12),
>  		(cpurev & 0x000F0) >> 4,
>  		(cpurev & 0x0000F) >> 0,
>  		mxc_get_clock(MXC_ARM_CLK) / 1000000);
> +#endif
>  
>  #if defined(CONFIG_MX6) && defined(CONFIG_IMX6_THERMAL)
>  	ret = uclass_get_device(UCLASS_THERMAL, 0, &thermal_dev);
> diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
> index 28ba844..a2cd0a9 100644
> --- a/arch/arm/include/asm/arch-mx6/sys_proto.h
> +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
> @@ -16,6 +16,7 @@
>  
>  u32 get_nr_cpus(void);
>  u32 get_cpu_rev(void);
> +u32 get_cpu_speed_grade_hz(void);
>  
>  /* returns MXC_CPU_ value */
>  #define cpu_type(rev) (((rev) >> 12)&0xff)
> diff --git a/arch/arm/include/asm/proc b/arch/arm/include/asm/proc
> new file mode 120000
> index 0000000..c7f3c20
> --- /dev/null
> +++ b/arch/arm/include/asm/proc
> @@ -0,0 +1 @@
> +proc-armv
> \ No newline at end of file
>