[U-Boot] [PATCH 12/24] arm: Allow cleanup_before_linux() without disabling caches

Simon Glass
2015-05-04T17:31:05Z

This function is used before jumping to U-Boot, but in that case we don't
always want to disable caches.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
---

arch/arm/cpu/armv7/cpu.c | 47 +++++++++++++++++++++++++++++------------------
include/common.h | 15 +++++++++++++++
2 files changed, 44 insertions(+), 18 deletions(-)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index c56417d..0b0e500 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -24,7 +24,7 @@

void __weak cpu_cache_initialization(void){}

-int cleanup_before_linux(void)
+int cleanup_before_linux_select(int flags)
{
/*
* this function is called just before we call linux
@@ -42,24 +42,30 @@ int cleanup_before_linux(void)
icache_disable();
invalidate_icache_all();

- /*
- * turn off D-cache
- * dcache_disable() in turn flushes the d-cache and disables MMU
- */
- dcache_disable();
- v7_outer_cache_disable();
+ if (flags & CBL_DISABLE_CACHES) {
+ /*
+ * turn off D-cache
+ * dcache_disable() in turn flushes the d-cache and disables MMU
+ */
+ dcache_disable();
+ v7_outer_cache_disable();

- /*
- * After D-cache is flushed and before it is disabled there may
- * be some new valid entries brought into the cache. We are sure
- * that these lines are not dirty and will not affect our execution.
- * (because unwinding the call-stack and setting a bit in CP15 SCTLR
- * is all we did during this. We have not pushed anything on to the
- * stack. Neither have we affected any static data)
- * So just invalidate the entire d-cache again to avoid coherency
- * problems for kernel
- */
- invalidate_dcache_all();
+ /*
+ * After D-cache is flushed and before it is disabled there may
+ * be some new valid entries brought into the cache. We are
+ * sure that these lines are not dirty and will not affect our
+ * execution. (because unwinding the call-stack and setting a
+ * bit in CP15 SCTRL is all we did during this. We have not
+ * pushed anything on to the stack. Neither have we affected
+ * any static data) So just invalidate the entire d-cache again
+ * to avoid coherency problems for kernel
+ */
+ invalidate_dcache_all();
+ } else {
+ flush_dcache_all();
+ invalidate_icache_all();
+ icache_enable();
+ }

/*
* Some CPU need more cache attention before starting the kernel.
@@ -68,3 +74,8 @@ int cleanup_before_linux(void)

return 0;
}
+
+int cleanup_before_linux(void)
+{
+ return cleanup_before_linux_select(CBL_ALL);
+}
diff --git a/include/common.h b/include/common.h
index cde3474..0b21599 100644
--- a/include/common.h
+++ b/include/common.h
@@ -728,6 +728,21 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop);
void invalidate_dcache_all(void);
void invalidate_icache_all(void);

+enum {
+ /* Disable caches (else flush caches but leave them active) */
+ CBL_DISABLE_CACHES = 1 << 0,
+ CBL_SHOW_BOOTSTAGE_REPORT = 1 << 1,
+
+ CBL_ALL = 3,
+};
+
+/**
+ * Clean up ready for linux
+ *
+ * @param flags Flags to control what is done
+ */
+int cleanup_before_linux_select(int flags);
+
/* arch/$(ARCH)/lib/ticks.S */
uint64_t get_ticks(void);
void wait_ticks (unsigned long);
--
2.2.0.rc0.207.ga3a616c