* [U-Boot] [PATCH v2] arm, imx6, i2c: add I2C4 for MX6DL
@ 2015-05-13 5:50 Heiko Schocher
2015-05-15 13:49 ` Stefano Babic
0 siblings, 1 reply; 2+ messages in thread
From: Heiko Schocher @ 2015-05-13 5:50 UTC (permalink / raw)
To: u-boot
add I2C4 modul for MX6DL based boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
checkpatch shows:
WARNING: line over 80 characters
+#define MXC_CCM_CCGR1_I2C4_SERIAL_MASK (3 << MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET)
but the hole file is full of lines longer than80 characters, so
I let this line in the old style ...
Changes in v2:
- add comment from Stefano Babic
- reworked patch on base of commit f8cb101e1e3f5
- follow up patch cleans up different define naming
arch/arm/cpu/armv7/mx6/clock.c | 33 +++++++++++++++++++++-----------
arch/arm/imx-common/i2c-mxv7.c | 5 ++++-
arch/arm/include/asm/arch-mx6/crm_regs.h | 2 ++
arch/arm/include/asm/arch-mx6/imx-regs.h | 1 +
drivers/i2c/mxc_i2c.c | 5 ++++-
5 files changed, 33 insertions(+), 13 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 055f44e..ae99945 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -140,23 +140,34 @@ int enable_usdhc_clk(unsigned char enable, unsigned bus_num)
#endif
#ifdef CONFIG_SYS_I2C_MXC
-/* i2c_num can be from 0 - 2 */
+/* i2c_num can be from 0 - 3 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
u32 reg;
u32 mask;
- if (i2c_num > 2)
+ if (i2c_num > 3)
return -EINVAL;
-
- mask = MXC_CCM_CCGR_CG_MASK
- << (MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET + (i2c_num << 1));
- reg = __raw_readl(&imx_ccm->CCGR2);
- if (enable)
- reg |= mask;
- else
- reg &= ~mask;
- __raw_writel(reg, &imx_ccm->CCGR2);
+ if (i2c_num < 3) {
+ mask = MXC_CCM_CCGR_CG_MASK
+ << (MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET
+ + (i2c_num << 1));
+ reg = __raw_readl(&imx_ccm->CCGR2);
+ if (enable)
+ reg |= mask;
+ else
+ reg &= ~mask;
+ __raw_writel(reg, &imx_ccm->CCGR2);
+ } else {
+ mask = MXC_CCM_CCGR_CG_MASK
+ << (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET);
+ reg = __raw_readl(&imx_ccm->CCGR1);
+ if (enable)
+ reg |= mask;
+ else
+ reg &= ~mask;
+ __raw_writel(reg, &imx_ccm->CCGR1);
+ }
return 0;
}
#endif
diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c
index 1a632e7..33205fb 100644
--- a/arch/arm/imx-common/i2c-mxv7.c
+++ b/arch/arm/imx-common/i2c-mxv7.c
@@ -67,9 +67,12 @@ static void * const i2c_bases[] = {
#ifdef I2C3_BASE_ADDR
(void *)I2C3_BASE_ADDR,
#endif
+#ifdef I2C4_BASE_ADDR
+ (void *)I2C4_BASE_ADDR,
+#endif
};
-/* i2c_index can be from 0 - 2 */
+/* i2c_index can be from 0 - 3 */
int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
struct i2c_pads_info *p)
{
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 0592ce0..887d048 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -592,6 +592,8 @@ struct mxc_ccm_reg {
#define MXC_CCM_CCGR2_I2C2_SERIAL_MASK (3 << MXC_CCM_CCGR2_I2C2_SERIAL_OFFSET)
#define MXC_CCM_CCGR2_I2C3_SERIAL_OFFSET 10
#define MXC_CCM_CCGR2_I2C3_SERIAL_MASK (3 << MXC_CCM_CCGR2_I2C3_SERIAL_OFFSET)
+#define MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET 8
+#define MXC_CCM_CCGR1_I2C4_SERIAL_MASK (3 << MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET)
#define MXC_CCM_CCGR2_OCOTP_CTRL_OFFSET 12
#define MXC_CCM_CCGR2_OCOTP_CTRL_MASK (3 << MXC_CCM_CCGR2_OCOTP_CTRL_OFFSET)
#define MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_OFFSET 14
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 9a4ad8b..3d3d137 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -277,6 +277,7 @@
#define UART3_BASE (AIPS2_OFF_BASE_ADDR + 0x6C000)
#define UART4_BASE (AIPS2_OFF_BASE_ADDR + 0x70000)
#define UART5_BASE (AIPS2_OFF_BASE_ADDR + 0x74000)
+#define I2C4_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x78000)
#define IP2APB_USBPHY1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x78000)
#define IP2APB_USBPHY2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 42782cb..c258a2b 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -421,7 +421,10 @@ static void * const i2c_bases[] = {
defined(CONFIG_MX6) || defined(CONFIG_LS102XA)
(void *)I2C1_BASE_ADDR,
(void *)I2C2_BASE_ADDR,
- (void *)I2C3_BASE_ADDR
+ (void *)I2C3_BASE_ADDR,
+#if defined(CONFIG_MX6DL)
+ (void *)I2C4_BASE_ADDR
+#endif
#elif defined(CONFIG_VF610)
(void *)I2C0_BASE_ADDR
#elif defined(CONFIG_FSL_LSCH3)
--
2.1.0
^ permalink raw reply related [flat|nested] 2+ messages in thread* [U-Boot] [PATCH v2] arm, imx6, i2c: add I2C4 for MX6DL
2015-05-13 5:50 [U-Boot] [PATCH v2] arm, imx6, i2c: add I2C4 for MX6DL Heiko Schocher
@ 2015-05-15 13:49 ` Stefano Babic
0 siblings, 0 replies; 2+ messages in thread
From: Stefano Babic @ 2015-05-15 13:49 UTC (permalink / raw)
To: u-boot
On 13/05/2015 07:50, Heiko Schocher wrote:
> add I2C4 modul for MX6DL based boards.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
>
> ---
> checkpatch shows:
> WARNING: line over 80 characters
> +#define MXC_CCM_CCGR1_I2C4_SERIAL_MASK (3 << MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET)
>
> but the hole file is full of lines longer than80 characters, so
> I let this line in the old style ...
>
> Changes in v2:
> - add comment from Stefano Babic
> - reworked patch on base of commit f8cb101e1e3f5
> - follow up patch cleans up different define naming
>
> arch/arm/cpu/armv7/mx6/clock.c | 33 +++++++++++++++++++++-----------
> arch/arm/imx-common/i2c-mxv7.c | 5 ++++-
> arch/arm/include/asm/arch-mx6/crm_regs.h | 2 ++
> arch/arm/include/asm/arch-mx6/imx-regs.h | 1 +
> drivers/i2c/mxc_i2c.c | 5 ++++-
> 5 files changed, 33 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 055f44e..ae99945 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -140,23 +140,34 @@ int enable_usdhc_clk(unsigned char enable, unsigned bus_num)
> #endif
>
> #ifdef CONFIG_SYS_I2C_MXC
> -/* i2c_num can be from 0 - 2 */
> +/* i2c_num can be from 0 - 3 */
> int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
> {
> u32 reg;
> u32 mask;
>
> - if (i2c_num > 2)
> + if (i2c_num > 3)
> return -EINVAL;
> -
> - mask = MXC_CCM_CCGR_CG_MASK
> - << (MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET + (i2c_num << 1));
> - reg = __raw_readl(&imx_ccm->CCGR2);
> - if (enable)
> - reg |= mask;
> - else
> - reg &= ~mask;
> - __raw_writel(reg, &imx_ccm->CCGR2);
> + if (i2c_num < 3) {
> + mask = MXC_CCM_CCGR_CG_MASK
> + << (MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET
> + + (i2c_num << 1));
> + reg = __raw_readl(&imx_ccm->CCGR2);
> + if (enable)
> + reg |= mask;
> + else
> + reg &= ~mask;
> + __raw_writel(reg, &imx_ccm->CCGR2);
> + } else {
> + mask = MXC_CCM_CCGR_CG_MASK
> + << (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET);
> + reg = __raw_readl(&imx_ccm->CCGR1);
> + if (enable)
> + reg |= mask;
> + else
> + reg &= ~mask;
> + __raw_writel(reg, &imx_ccm->CCGR1);
> + }
> return 0;
> }
> #endif
> diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c
> index 1a632e7..33205fb 100644
> --- a/arch/arm/imx-common/i2c-mxv7.c
> +++ b/arch/arm/imx-common/i2c-mxv7.c
> @@ -67,9 +67,12 @@ static void * const i2c_bases[] = {
> #ifdef I2C3_BASE_ADDR
> (void *)I2C3_BASE_ADDR,
> #endif
> +#ifdef I2C4_BASE_ADDR
> + (void *)I2C4_BASE_ADDR,
> +#endif
> };
>
> -/* i2c_index can be from 0 - 2 */
> +/* i2c_index can be from 0 - 3 */
> int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
> struct i2c_pads_info *p)
> {
> diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
> index 0592ce0..887d048 100644
> --- a/arch/arm/include/asm/arch-mx6/crm_regs.h
> +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
> @@ -592,6 +592,8 @@ struct mxc_ccm_reg {
> #define MXC_CCM_CCGR2_I2C2_SERIAL_MASK (3 << MXC_CCM_CCGR2_I2C2_SERIAL_OFFSET)
> #define MXC_CCM_CCGR2_I2C3_SERIAL_OFFSET 10
> #define MXC_CCM_CCGR2_I2C3_SERIAL_MASK (3 << MXC_CCM_CCGR2_I2C3_SERIAL_OFFSET)
> +#define MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET 8
> +#define MXC_CCM_CCGR1_I2C4_SERIAL_MASK (3 << MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET)
> #define MXC_CCM_CCGR2_OCOTP_CTRL_OFFSET 12
> #define MXC_CCM_CCGR2_OCOTP_CTRL_MASK (3 << MXC_CCM_CCGR2_OCOTP_CTRL_OFFSET)
> #define MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_OFFSET 14
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index 9a4ad8b..3d3d137 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -277,6 +277,7 @@
> #define UART3_BASE (AIPS2_OFF_BASE_ADDR + 0x6C000)
> #define UART4_BASE (AIPS2_OFF_BASE_ADDR + 0x70000)
> #define UART5_BASE (AIPS2_OFF_BASE_ADDR + 0x74000)
> +#define I2C4_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x78000)
> #define IP2APB_USBPHY1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x78000)
> #define IP2APB_USBPHY2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
>
> diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
> index 42782cb..c258a2b 100644
> --- a/drivers/i2c/mxc_i2c.c
> +++ b/drivers/i2c/mxc_i2c.c
> @@ -421,7 +421,10 @@ static void * const i2c_bases[] = {
> defined(CONFIG_MX6) || defined(CONFIG_LS102XA)
> (void *)I2C1_BASE_ADDR,
> (void *)I2C2_BASE_ADDR,
> - (void *)I2C3_BASE_ADDR
> + (void *)I2C3_BASE_ADDR,
> +#if defined(CONFIG_MX6DL)
> + (void *)I2C4_BASE_ADDR
> +#endif
> #elif defined(CONFIG_VF610)
> (void *)I2C0_BASE_ADDR
> #elif defined(CONFIG_FSL_LSCH3)
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
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Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
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2015-05-13 5:50 [U-Boot] [PATCH v2] arm, imx6, i2c: add I2C4 for MX6DL Heiko Schocher
2015-05-15 13:49 ` Stefano Babic
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