[U-Boot] [PATCH 00/19] imx: ventana: misc updates

[U-Boot] [PATCH 00/19] imx: ventana: misc updates

[Tim Harvey]

This collection of patches comprises a set of various updates I've been
on for Ventana.

In summary:
 - enable driver model
 - enable gpio command
 - enable dm-serial
 - enable thermal support
 - fixup for GW522x PCI enumeration
 - split out common code shared between SPL an U-Boot
 - pull down various init code to the SPL for use in Falcon mode
 - enable Falcon mode (based on env var)

The enabling of Falcon mode is dependent on a patch I submitted earlier
allowing nand env in spl [1].

Currently Falcon mode is configured for NAND boot. I plan on re-working
a pending patchset I have that allows dynamic env support (use mmc or nand
env depending on boot device) but I still need to re-work that using
driver-model so it will come later.

I will send a followup patch with README updates explaining our use of Falcon
mode if everything here looks good.

Tim

[1] https://patchwork.ozlabs.org/patch/470191/

Tim Harvey (19):
  imx: ventana: set dtype env var to boot media
  imx: ventana: display SPL boot device
  imx: ventana: config: enable gpio command
  imx: ventana: config: enable driver model
  imx: ventana: register gpio's with gpio_request
  imx: ventana: enable DM_SERIAL
  imx: ventana: config: enable Thermal support
  imx: ventana: config: use MMC SPL RAW support
  imx: ventana: (cosmetic) clean up size defines for improved
    readability
  imx: ventana: fix pcie reset for GW522x
  imx: ventana: default msata/pci mux to pci before PCI enumeration
  imx: ventana: split out common functions between SPL and uboot
  imx: ventana: move GSC boot watchdog disable function to gsc.c
  imx: ventana: detect pmic using i2c probe instead of board model
  imx: ventana: use common uart and i2c setup functions in SPL
  imx: ventana: add gpio setup to SPL
  imx: ventana: add pmic_setup to SPL
  imx: ventana: add GSC boot watchdog disable to SPL
  imx: ventana: config: enable Falcon mode

 board/gateworks/gw_ventana/Makefile         |   2 +-
 board/gateworks/gw_ventana/common.c         | 827 +++++++++++++++++++++++++
 board/gateworks/gw_ventana/common.h         |  98 +++
 board/gateworks/gw_ventana/gsc.c            |  27 +
 board/gateworks/gw_ventana/gsc.h            |   1 +
 board/gateworks/gw_ventana/gw_ventana.c     | 911 ++--------------------------
 board/gateworks/gw_ventana/gw_ventana_spl.c | 103 ++--
 include/configs/gw_ventana.h                |  67 +-
 8 files changed, 1102 insertions(+), 934 deletions(-)
 create mode 100644 board/gateworks/gw_ventana/common.c
 create mode 100644 board/gateworks/gw_ventana/common.h

-- 
1.9.1

[U-Boot] [PATCH 01/19] imx: ventana: set dtype env var to boot media

[Tim Harvey]

Bootscripts for some distro's such as Android can benefit from knowing
what boot media its script was loaded from.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 684f347..48919e8 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -359,7 +359,7 @@
 	"mmc_boot=" \
 		"setenv fsload 'ext2load mmc 0:1'; " \
 		"mmc dev 0 && mmc rescan && " \
-		"run loadscript; " \
+		"setenv dtype mmc; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
 				"root=/dev/mmcblk0p1 rootfstype=ext4 " \
@@ -373,7 +373,7 @@
 	\
 	"sata_boot=" \
 		"setenv fsload 'ext2load sata 0:1'; sata init && " \
-		"run loadscript; " \
+		"setenv dtype sata; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
 				"root=/dev/sda1 rootfstype=ext4 " \
@@ -386,7 +386,7 @@
 		"fi\0" \
 	"usb_boot=" \
 		"setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
-		"run loadscript; " \
+		"setenv dtype usb; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
 				"root=/dev/sda1 rootfstype=ext4 " \
@@ -450,7 +450,7 @@
 			"setenv root ubi0:rootfs ubi.mtd=2 " \
 				"rootfstype=ubifs; " \
 		"fi; " \
-		"run loadscript; " \
+		"setenv dtype nand; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
 				"root=${root} ${video} ${extra}; " \
-- 
1.9.1

[U-Boot] [PATCH 02/19] imx: ventana: display SPL boot device

[Tim Harvey]

Display what device the SPL will fetch uboot.img from

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana_spl.c | 22 ++++++++++++++++++++++
 include/configs/gw_ventana.h                |  1 +
 2 files changed, 23 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 289a0b8..8fe0cae 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -570,6 +570,28 @@ void board_init_f(ulong dummy)
 	board_init_r(NULL, 0);
 }
 
+/* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
+/* its our chance to print info about boot device */
+void spl_board_init(void)
+{
+	/* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 */
+	u32 boot_device = spl_boot_device();
+
+	switch (boot_device) {
+	case BOOT_DEVICE_MMC1:
+		puts("Booting from MMC\n");
+		break;
+	case BOOT_DEVICE_NAND:
+		puts("Booting from NAND\n");
+		break;
+	case BOOT_DEVICE_SATA:
+		puts("Booting from SATA\n");
+		break;
+	default:
+		puts("Unknown boot device\n");
+	}
+}
+
 void reset_cpu(ulong addr)
 {
 }
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 48919e8..dfe818e 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -8,6 +8,7 @@
 #define __CONFIG_H
 
 /* SPL */
+#define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
 #define CONFIG_SPL_FAT_SUPPORT
-- 
1.9.1

[U-Boot] [PATCH 03/19] imx: ventana: config: enable gpio command

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index dfe818e..db0cf51 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -47,6 +47,7 @@
 
 /* GPIO */
 #define CONFIG_MXC_GPIO
+#define CONFIG_CMD_GPIO
 
 /* Serial */
 #define CONFIG_MXC_UART
-- 
1.9.1

[U-Boot] [PATCH 04/19] imx: ventana: config: enable driver model

[Tim Harvey]

Enable U-Boot Driver Model (DM).

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index db0cf51..20bc4dc 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -45,6 +45,13 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MISC_INIT_R
 
+/* Driver Model */
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_DM
+#define CONFIG_DM_GPIO
+#define CONFIG_CMD_DM
+#endif
+
 /* GPIO */
 #define CONFIG_MXC_GPIO
 #define CONFIG_CMD_GPIO
-- 
1.9.1

[U-Boot] [PATCH 05/19] imx: ventana: register gpio's with gpio_request

[Tim Harvey]

Prior to using a gpio a call to gpio_request() should be called to register
it with the gpio subsystem.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 77 ++++++++++++++++++++++++---------
 1 file changed, 57 insertions(+), 20 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 1e54912..8818be4 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -268,14 +268,15 @@ static void setup_gpmi_nand(void)
 }
 #endif
 
-static void setup_iomux_enet(void)
+static void setup_iomux_enet(int gpio)
 {
 	SETUP_IOMUX_PADS(enet_pads);
 
 	/* toggle PHY_RST# */
-	gpio_direction_output(GP_PHY_RST, 0);
+	gpio_request(gpio, "phy_rst#");
+	gpio_direction_output(gpio, 0);
 	mdelay(2);
-	gpio_set_value(GP_PHY_RST, 1);
+	gpio_set_value(gpio, 1);
 }
 
 static void setup_iomux_uart(void)
@@ -295,6 +296,7 @@ static iomux_v3_cfg_t const usb_pads[] = {
 int board_ehci_hcd_init(int port)
 {
 	struct ventana_board_info *info = &ventana_info;
+	int gpio;
 
 	SETUP_IOMUX_PADS(usb_pads);
 
@@ -303,18 +305,22 @@ int board_ehci_hcd_init(int port)
 	case '3': /* GW53xx */
 	case '5': /* GW552x */
 		SETUP_IOMUX_PAD(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG);
-		gpio_direction_output(IMX_GPIO_NR(1, 9), 0);
-		mdelay(2);
-		gpio_set_value(IMX_GPIO_NR(1, 9), 1);
+		gpio = (IMX_GPIO_NR(1, 9));
 		break;
 	case '4': /* GW54xx */
 		SETUP_IOMUX_PAD(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG);
-		gpio_direction_output(IMX_GPIO_NR(1, 16), 0);
-		mdelay(2);
-		gpio_set_value(IMX_GPIO_NR(1, 16), 1);
+		gpio = (IMX_GPIO_NR(1, 16));
 		break;
+	default:
+		return 0;
 	}
 
+	/* request and toggle hub rst */
+	gpio_request(gpio, "usb_hub_rst#");
+	gpio_direction_output(gpio, 0);
+	mdelay(2);
+	gpio_set_value(gpio, 1);
+
 	return 0;
 }
 
@@ -322,6 +328,7 @@ int board_ehci_power(int port, int on)
 {
 	if (port)
 		return 0;
+	gpio_request(GP_USB_OTG_PWR, "usb_otg_pwr");
 	gpio_set_value(GP_USB_OTG_PWR, on);
 	return 0;
 }
@@ -333,6 +340,7 @@ static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
 int board_mmc_getcd(struct mmc *mmc)
 {
 	/* Card Detect */
+	gpio_request(GP_SD3_CD, "sd_cd");
 	gpio_direction_input(GP_SD3_CD);
 	return !gpio_get_value(GP_SD3_CD);
 }
@@ -364,6 +372,7 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
 
 static void setup_spi(void)
 {
+	gpio_request(IMX_GPIO_NR(3, 19), "spi_cs");
 	gpio_direction_output(IMX_GPIO_NR(3, 19), 1);
 	SETUP_IOMUX_PADS(ecspi1_pads);
 }
@@ -399,7 +408,7 @@ int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FEC_MXC
 	if (board_type != GW551x && board_type != GW552x) {
-		setup_iomux_enet();
+		setup_iomux_enet(GP_PHY_RST);
 		cpu_eth_init(bis);
 	}
 #endif
@@ -449,6 +458,7 @@ static void enable_lvds(struct display_info_t const *dev)
 	writel(reg, &iomux->gpr[2]);
 
 	/* Enable Backlight */
+	gpio_request(IMX_GPIO_NR(1, 18), "bklt_en");
 	SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 | DIO_PAD_CFG);
 	gpio_direction_output(IMX_GPIO_NR(1, 18), 1);
 }
@@ -588,6 +598,7 @@ static void setup_display(void)
 	writel(reg, &iomux->gpr[3]);
 
 	/* Backlight CABEN on LVDS connector */
+	gpio_request(IMX_GPIO_NR(1, 10), "bklt_gpio");
 	SETUP_IOMUX_PAD(PAD_SD2_CLK__GPIO1_IO10 | DIO_PAD_CFG);
 	gpio_direction_output(IMX_GPIO_NR(1, 10), 0);
 }
@@ -1158,9 +1169,11 @@ static void setup_board_gpio(int board)
 		return;
 
 	/* RS232_EN# */
+	gpio_request(GP_RS232_EN, "rs232_en");
 	gpio_direction_output(GP_RS232_EN, (hwconfig("rs232")) ? 0 : 1);
 
 	/* MSATA Enable */
+	gpio_request(GP_MSATA_SEL, "msata_en");
 	if (is_cpu_type(MXC_CPU_MX6Q) &&
 	    test_bit(EECONFIG_SATA, info->config)) {
 		gpio_direction_output(GP_MSATA_SEL,
@@ -1175,50 +1188,71 @@ static void setup_board_gpio(int board)
 		gpio_cfg[board].pcie_rst = IMX_GPIO_NR(3, 23);
 
 	/* assert PCI_RST# (released by OS when clock is valid) */
+	gpio_request(gpio_cfg[board].pcie_rst, "pci_rst#");
 	gpio_direction_output(gpio_cfg[board].pcie_rst, 0);
 #endif
 
 	/* turn off (active-high) user LED's */
 	for (i = 0; i < ARRAY_SIZE(gpio_cfg[board].leds); i++) {
-		if (gpio_cfg[board].leds[i])
+		if (gpio_cfg[board].leds[i]) {
+			gpio_requestf(gpio_cfg[board].leds[i], "led_user%d", i);
 			gpio_direction_output(gpio_cfg[board].leds[i], 1);
+		}
 	}
 
 	/* Expansion Mezzanine IO */
-	if (gpio_cfg[board].mezz_pwren)
+	if (gpio_cfg[board].mezz_pwren) {
+		gpio_request(gpio_cfg[board].mezz_pwren, "mezz_pwr");
 		gpio_direction_output(gpio_cfg[board].mezz_pwren, 0);
-	if (gpio_cfg[board].mezz_irq)
+	}
+	if (gpio_cfg[board].mezz_irq) {
+		gpio_request(gpio_cfg[board].mezz_irq, "mezz_irq#");
 		gpio_direction_input(gpio_cfg[board].mezz_irq);
+	}
 
 	/* RS485 Transmit Enable */
-	if (gpio_cfg[board].rs485en)
+	if (gpio_cfg[board].rs485en) {
+		gpio_request(gpio_cfg[board].rs485en, "rs485_en");
 		gpio_direction_output(gpio_cfg[board].rs485en, 0);
+	}
 
 	/* GPS_SHDN */
-	if (gpio_cfg[board].gps_shdn)
+	if (gpio_cfg[board].gps_shdn) {
+		gpio_request(gpio_cfg[board].gps_shdn, "gps_shdn");
 		gpio_direction_output(gpio_cfg[board].gps_shdn, 1);
+	}
 
 	/* Analog video codec power enable */
-	if (gpio_cfg[board].vidin_en)
+	if (gpio_cfg[board].vidin_en) {
+		gpio_request(gpio_cfg[board].vidin_en, "anavidin_en");
 		gpio_direction_output(gpio_cfg[board].vidin_en, 1);
+	}
 
 	/* DIOI2C_DIS# */
-	if (gpio_cfg[board].dioi2c_en)
+	if (gpio_cfg[board].dioi2c_en) {
+		gpio_request(gpio_cfg[board].dioi2c_en, "dioi2c_dis#");
 		gpio_direction_output(gpio_cfg[board].dioi2c_en, 0);
+	}
 
 	/* PCICK_SSON: disable spread-spectrum clock */
-	if (gpio_cfg[board].pcie_sson)
+	if (gpio_cfg[board].pcie_sson) {
+		gpio_request(gpio_cfg[board].pcie_sson, "pci_sson");
 		gpio_direction_output(gpio_cfg[board].pcie_sson, 0);
+	}
 
 	/* USBOTG Select (PCISKT or FrontPanel) */
-	if (gpio_cfg[board].usb_sel)
+	if (gpio_cfg[board].usb_sel) {
+		gpio_request(gpio_cfg[board].usb_sel, "usb_pcisel");
 		gpio_direction_output(gpio_cfg[board].usb_sel,
 				      (hwconfig("usb_pcisel")) ? 1 : 0);
+	}
 
 
 	/* PCISKT_WDIS# (Wireless disable GPIO to miniPCIe sockets) */
-	if (gpio_cfg[board].wdis)
+	if (gpio_cfg[board].wdis) {
+		gpio_request(gpio_cfg[board].wdis, "wlan_dis");
 		gpio_direction_output(gpio_cfg[board].wdis, 1);
+	}
 
 	/*
 	 * Configure DIO pinmux/padctl registers
@@ -1248,6 +1282,7 @@ static void setup_board_gpio(int board)
 			}
 			imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] |
 					       ctrl);
+			gpio_requestf(cfg->gpio_param, "dio%d", i);
 			gpio_direction_input(cfg->gpio_param);
 		} else if (hwconfig_subarg_cmp("dio2", "mode", "pwm") &&
 			   cfg->pwm_padmux) {
@@ -1274,6 +1309,7 @@ int imx6_pcie_toggle_reset(void)
 {
 	if (board_type < GW_UNKNOWN) {
 		uint pin = gpio_cfg[board_type].pcie_rst;
+		gpio_request(pin, "pci_rst#");
 		gpio_direction_output(pin, 0);
 		mdelay(50);
 		gpio_direction_output(pin, 1);
@@ -1343,6 +1379,7 @@ void get_board_serial(struct tag_serialnr *serialnr)
 int board_early_init_f(void)
 {
 	setup_iomux_uart();
+
 	gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */
 
 #if defined(CONFIG_VIDEO_IPUV3)
-- 
1.9.1

[U-Boot] [PATCH 06/19] imx: ventana: enable DM_SERIAL

[Tim Harvey]

mxc_serial supports DM so lets use it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 9 +++++++++
 include/configs/gw_ventana.h            | 1 +
 2 files changed, 10 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 8818be4..554cd84 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -22,6 +22,7 @@
 #include <asm/imx-common/sata.h>
 #include <asm/imx-common/spi.h>
 #include <asm/imx-common/video.h>
+#include <dm/platform_data/serial_mxc.h>
 #include <jffs2/load_kernel.h>
 #include <hwconfig.h>
 #include <i2c.h>
@@ -1820,3 +1821,11 @@ int ft_board_setup(void *blob, bd_t *bd)
 }
 #endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */
 
+static struct mxc_serial_platdata ventana_mxc_serial_plat = {
+	.reg = (struct mxc_uart *)UART2_BASE,
+};
+
+U_BOOT_DEVICE(ventana_serial) = {
+	.name   = "serial_mxc",
+	.platdata = &ventana_mxc_serial_plat,
+};
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 20bc4dc..ea1848a 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -49,6 +49,7 @@
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_DM
 #define CONFIG_DM_GPIO
+#define CONFIG_DM_SERIAL
 #define CONFIG_CMD_DM
 #endif
 
-- 
1.9.1

[U-Boot] [PATCH 07/19] imx: ventana: config: enable Thermal support

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index ea1848a..63af20c 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -50,6 +50,7 @@
 #define CONFIG_DM
 #define CONFIG_DM_GPIO
 #define CONFIG_DM_SERIAL
+#define CONFIG_DM_THERMAL
 #define CONFIG_CMD_DM
 #endif
 
@@ -57,6 +58,9 @@
 #define CONFIG_MXC_GPIO
 #define CONFIG_CMD_GPIO
 
+/* Thermal */
+#define CONFIG_IMX6_THERMAL
+
 /* Serial */
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE	       UART2_BASE
-- 
1.9.1

[U-Boot] [PATCH 08/19] imx: ventana: config: use MMC SPL RAW support

[Tim Harvey]

Switch to MMC RAW support for SPL. We will place the uboot.img at 69KB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 63af20c..e18e262 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -11,10 +11,8 @@
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-/*
-#define CONFIG_SPL_SATA_SUPPORT
-*/
+/* Location on MMC to read U-Boot from */
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* 69KB */
 /* Location in NAND to read U-Boot from */
 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * 1024 * 1024)
 
-- 
1.9.1

[U-Boot] [PATCH 08/19] imx: ventana: config: use MMC SPL RAW support

[Fabio Estevam]

Hi Tim,

On Fri, May 8, 2015 at 10:28 PM, Tim Harvey <tharvey@gateworks.com> wrote:
> Switch to MMC RAW support for SPL. We will place the uboot.img at 69KB.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  include/configs/gw_ventana.h | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
> index 63af20c..e18e262 100644
> --- a/include/configs/gw_ventana.h
> +++ b/include/configs/gw_ventana.h
> @@ -11,10 +11,8 @@
>  #define CONFIG_SPL_BOARD_INIT
>  #define CONFIG_SPL_NAND_SUPPORT
>  #define CONFIG_SPL_MMC_SUPPORT
> -#define CONFIG_SPL_FAT_SUPPORT
> -/*
> -#define CONFIG_SPL_SATA_SUPPORT
> -*/
> +/* Location on MMC to read U-Boot from */
> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* 69KB */

No need to define this as it is the default from imx6_spl.h

[U-Boot] [PATCH 08/19] imx: ventana: config: use MMC SPL RAW support

[Tim Harvey]

On Fri, May 8, 2015 at 6:36 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Tim,
>
> On Fri, May 8, 2015 at 10:28 PM, Tim Harvey <tharvey@gateworks.com> wrote:
>> Switch to MMC RAW support for SPL. We will place the uboot.img at 69KB.
>>
>> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>> ---
>>  include/configs/gw_ventana.h | 6 ++----
>>  1 file changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
>> index 63af20c..e18e262 100644
>> --- a/include/configs/gw_ventana.h
>> +++ b/include/configs/gw_ventana.h
>> @@ -11,10 +11,8 @@
>>  #define CONFIG_SPL_BOARD_INIT
>>  #define CONFIG_SPL_NAND_SUPPORT
>>  #define CONFIG_SPL_MMC_SUPPORT
>> -#define CONFIG_SPL_FAT_SUPPORT
>> -/*
>> -#define CONFIG_SPL_SATA_SUPPORT
>> -*/
>> +/* Location on MMC to read U-Boot from */
>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* 69KB */
>
> No need to define this as it is the default from imx6_spl.h

Fabio,

Thanks for pointing that out - I'll remove it.

Tim

[U-Boot] [PATCH 08/19] imx: ventana: config: use MMC SPL RAW support

[Stefano Babic]

Hi Tim,

On 13/05/2015 01:23, Tim Harvey wrote:
> On Fri, May 8, 2015 at 6:36 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> Hi Tim,
>>
>> On Fri, May 8, 2015 at 10:28 PM, Tim Harvey <tharvey@gateworks.com> wrote:
>>> Switch to MMC RAW support for SPL. We will place the uboot.img at 69KB.
>>>
>>> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>>> ---
>>>  include/configs/gw_ventana.h | 6 ++----
>>>  1 file changed, 2 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
>>> index 63af20c..e18e262 100644
>>> --- a/include/configs/gw_ventana.h
>>> +++ b/include/configs/gw_ventana.h
>>> @@ -11,10 +11,8 @@
>>>  #define CONFIG_SPL_BOARD_INIT
>>>  #define CONFIG_SPL_NAND_SUPPORT
>>>  #define CONFIG_SPL_MMC_SUPPORT
>>> -#define CONFIG_SPL_FAT_SUPPORT
>>> -/*
>>> -#define CONFIG_SPL_SATA_SUPPORT
>>> -*/
>>> +/* Location on MMC to read U-Boot from */
>>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* 69KB */
>>
>> No need to define this as it is the default from imx6_spl.h
> 
> Fabio,
> 
> Thanks for pointing that out - I'll remove it.
> 

Then rework the commit message, pointing to the remove of SPL_FAT and
SPL_SATA.

I like that your patchset is fully orthogonal - rewieving is easier and
I do not miss your changes - thanks for that !

For that reason, I am applying most of your patches - you do not need to
post the whole patchset again. Due to rework in this one, I would like
you repost in a new patchset only these ones:

imx: ventana: config: use MMC SPL RAW support (this one)
imx: ventana: (cosmetic) clean up size defines for improved readability
imx: ventana: add pmic_setup to SPL
imx: ventana: config: enable Falcon mode

I am merging the rest of your patches

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 09/19] imx: ventana: (cosmetic) clean up size defines for improved readability

[Tim Harvey]

Use the SZ_1M and SZ_1K macros from linuz/sizes.h for improved readability

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index e18e262..c61fbb9 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -7,6 +7,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/sizes.h>
+
 /* SPL */
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SUPPORT
@@ -14,7 +16,7 @@
 /* Location on MMC to read U-Boot from */
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* 69KB */
 /* Location in NAND to read U-Boot from */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * 1024 * 1024)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)
 
 #include "imx6_spl.h"                  /* common IMX6 SPL configuration */
 #include "mx6_common.h"
@@ -37,7 +39,7 @@
 #define CONFIG_SYS_GENERIC_BOARD
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
 
 /* Init Functions */
 #define CONFIG_BOARD_EARLY_INIT_F
@@ -309,19 +311,19 @@
 #define CONFIG_ENV_IS_IN_NAND
 #endif
 #if defined(CONFIG_ENV_IS_IN_MMC)
-  #define CONFIG_ENV_OFFSET              (6 * 64 * 1024)
-  #define CONFIG_ENV_SIZE                (8 * 1024)
+  #define CONFIG_ENV_OFFSET              (384 * SZ_1K)
+  #define CONFIG_ENV_SIZE                (8 * SZ_1K)
   #define CONFIG_SYS_MMC_ENV_DEV         0
 #elif defined(CONFIG_ENV_IS_IN_NAND)
-  #define CONFIG_ENV_OFFSET              (16 << 20)
-  #define CONFIG_ENV_SECT_SIZE           (128 << 10)
+  #define CONFIG_ENV_OFFSET              (16 * SZ_1M)
+  #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
   #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
-  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 << 10))
+  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 * SZ_1K))
   #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
-  #define CONFIG_ENV_OFFSET              (512 * 1024)
-  #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
-  #define CONFIG_ENV_SIZE                (8 * 1024)
+  #define CONFIG_ENV_OFFSET		(512 * SZ_1K)
+  #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
+  #define CONFIG_ENV_SIZE		(8 * SZ_1K)
   #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
   #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
   #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-- 
1.9.1

[U-Boot] [PATCH 10/19] imx: ventana: fix pcie reset for GW522x

[Tim Harvey]

The re-assignment of pcie_rst gpio for GW522x needs to occur earlier, before
the PCI subsystem calls the toggle funciton.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 554cd84..8cfc1f2 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -1184,10 +1184,6 @@ static void setup_board_gpio(int board)
 	}
 
 #if !defined(CONFIG_CMD_PCI)
-	/* GW522x Uses GPIO3_IO23 for PCIE_RST# */
-	if (board_type == GW52xx && info->model[4] == '2')
-		gpio_cfg[board].pcie_rst = IMX_GPIO_NR(3, 23);
-
 	/* assert PCI_RST# (released by OS when clock is valid) */
 	gpio_request(gpio_cfg[board].pcie_rst, "pci_rst#");
 	gpio_direction_output(gpio_cfg[board].pcie_rst, 0);
@@ -1435,6 +1431,10 @@ int board_init(void)
 		int count = gpio_cfg[board_type].num_pads;
 
 		imx_iomux_v3_setup_multiple_pads(p, count);
+
+		/* GW522x Uses GPIO3_IO23 for PCIE_RST# */
+		if (board_type == GW52xx && ventana_info.model[4] == '2')
+			gpio_cfg[board_type].pcie_rst = IMX_GPIO_NR(3, 23);
 	}
 
 	return 0;
-- 
1.9.1

[U-Boot] [PATCH 10/19] imx: ventana: fix pcie reset for GW522x

[Stefano Babic]

Hi Tim,

On 09/05/2015 03:28, Tim Harvey wrote:
> The re-assignment of pcie_rst gpio for GW522x needs to occur earlier, before
> the PCI subsystem calls the toggle funciton.
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/gw_ventana.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
> index 554cd84..8cfc1f2 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -1184,10 +1184,6 @@ static void setup_board_gpio(int board)
>  	}
>  
>  #if !defined(CONFIG_CMD_PCI)
> -	/* GW522x Uses GPIO3_IO23 for PCIE_RST# */
> -	if (board_type == GW52xx && info->model[4] == '2')
> -		gpio_cfg[board].pcie_rst = IMX_GPIO_NR(3, 23);
> -

This code runs now without #ifdef protection. Is it desired ?

>  	/* assert PCI_RST# (released by OS when clock is valid) */
>  	gpio_request(gpio_cfg[board].pcie_rst, "pci_rst#");
>  	gpio_direction_output(gpio_cfg[board].pcie_rst, 0);
> @@ -1435,6 +1431,10 @@ int board_init(void)
>  		int count = gpio_cfg[board_type].num_pads;
>  
>  		imx_iomux_v3_setup_multiple_pads(p, count);
> +
> +		/* GW522x Uses GPIO3_IO23 for PCIE_RST# */
> +		if (board_type == GW52xx && ventana_info.model[4] == '2')
> +			gpio_cfg[board_type].pcie_rst = IMX_GPIO_NR(3, 23);
>  	}
>  
>  	return 0;
> 

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 10/19] imx: ventana: fix pcie reset for GW522x

[Tim Harvey]

On Mon, May 11, 2015 at 12:59 AM, Stefano Babic <sbabic@denx.de> wrote:
> Hi Tim,
>
> On 09/05/2015 03:28, Tim Harvey wrote:
>> The re-assignment of pcie_rst gpio for GW522x needs to occur earlier, before
>> the PCI subsystem calls the toggle funciton.
>>
>> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>> ---
>>  board/gateworks/gw_ventana/gw_ventana.c | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
>> index 554cd84..8cfc1f2 100644
>> --- a/board/gateworks/gw_ventana/gw_ventana.c
>> +++ b/board/gateworks/gw_ventana/gw_ventana.c
>> @@ -1184,10 +1184,6 @@ static void setup_board_gpio(int board)
>>       }
>>
>>  #if !defined(CONFIG_CMD_PCI)
>> -     /* GW522x Uses GPIO3_IO23 for PCIE_RST# */
>> -     if (board_type == GW52xx && info->model[4] == '2')
>> -             gpio_cfg[board].pcie_rst = IMX_GPIO_NR(3, 23);
>> -
>
> This code runs now without #ifdef protection. Is it desired ?

Stefano,

Yes - I did intend to remove the #ifdef protection.

Regards,

Tim

[U-Boot] [PATCH 11/19] imx: ventana: default msata/pci mux to pci before PCI enumeration

[Tim Harvey]

PCI enumeration occurs early, before we fully configure our GPIO's. Make
sure we steer the MSATA/PCI mux to PCI in board_init to ensure PCI is
selected before enumeration.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 8cfc1f2..cf866ca 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -1174,13 +1174,10 @@ static void setup_board_gpio(int board)
 	gpio_direction_output(GP_RS232_EN, (hwconfig("rs232")) ? 0 : 1);
 
 	/* MSATA Enable */
-	gpio_request(GP_MSATA_SEL, "msata_en");
 	if (is_cpu_type(MXC_CPU_MX6Q) &&
 	    test_bit(EECONFIG_SATA, info->config)) {
 		gpio_direction_output(GP_MSATA_SEL,
 				      (hwconfig("msata")) ?  1 : 0);
-	} else {
-		gpio_direction_output(GP_MSATA_SEL, 0);
 	}
 
 #if !defined(CONFIG_CMD_PCI)
@@ -1435,6 +1432,10 @@ int board_init(void)
 		/* GW522x Uses GPIO3_IO23 for PCIE_RST# */
 		if (board_type == GW52xx && ventana_info.model[4] == '2')
 			gpio_cfg[board_type].pcie_rst = IMX_GPIO_NR(3, 23);
+
+		/* MSATA Enable - default to PCI */
+		gpio_request(GP_MSATA_SEL, "msata_en");
+		gpio_direction_output(GP_MSATA_SEL, 0);
 	}
 
 	return 0;
-- 
1.9.1

[U-Boot] [PATCH 12/19] imx: ventana: split out common functions between SPL and uboot

[Tim Harvey]

Move shared functions used by both SPL and U-Boot to common.c:
 - setup_iomux_uart() and uart pad config
 - gpio pad config

In the process also moved the following to common.c in preparation for
calling it from the SPL:
 - split i2c setup into a shared function
 - move pmic init to setup_pmic() function to call directly from
   power_init_board()
 - split gpio setup into early (iomux and default pin config)
   and late (output configuration based on env)

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/Makefile     |   2 +-
 board/gateworks/gw_ventana/common.c     | 823 ++++++++++++++++++++++++++++++
 board/gateworks/gw_ventana/common.h     |  98 ++++
 board/gateworks/gw_ventana/gw_ventana.c | 874 +-------------------------------
 4 files changed, 933 insertions(+), 864 deletions(-)
 create mode 100644 board/gateworks/gw_ventana/common.c
 create mode 100644 board/gateworks/gw_ventana/common.h

diff --git a/board/gateworks/gw_ventana/Makefile b/board/gateworks/gw_ventana/Makefile
index 33a1788..8fa691a 100644
--- a/board/gateworks/gw_ventana/Makefile
+++ b/board/gateworks/gw_ventana/Makefile
@@ -6,6 +6,6 @@
 # SPDX-License-Identifier:  GPL-2.0+
 #
 
-obj-y  := gw_ventana.o gsc.o eeprom.o
+obj-y  := gw_ventana.o gsc.o eeprom.o common.o
 obj-$(CONFIG_SPL_BUILD) += gw_ventana_spl.o
 
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
new file mode 100644
index 0000000..45c5b4c
--- /dev/null
+++ b/board/gateworks/gw_ventana/common.c
@@ -0,0 +1,823 @@
+/*
+ * Copyright (C) 2013 Gateworks Corporation
+ *
+ * Author: Tim Harvey <tharvey@gateworks.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/imx-common/mxc_i2c.h>
+#include <hwconfig.h>
+#include <power/pmic.h>
+#include <power/ltc3676_pmic.h>
+#include <power/pfuze100_pmic.h>
+
+#include "common.h"
+
+/* UART1: Function varies per baseboard */
+static iomux_v3_cfg_t const uart1_pads[] = {
+	IOMUX_PADS(PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
+/* UART2: Serial Console */
+static iomux_v3_cfg_t const uart2_pads[] = {
+	IOMUX_PADS(PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
+void setup_iomux_uart(void)
+{
+	SETUP_IOMUX_PADS(uart1_pads);
+	SETUP_IOMUX_PADS(uart2_pads);
+}
+
+/* I2C1: GSC */
+static struct i2c_pads_info mx6q_i2c_pad_info0 = {
+	.scl = {
+		.i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
+		.gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
+		.gp = IMX_GPIO_NR(3, 21)
+	},
+	.sda = {
+		.i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
+		.gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
+		.gp = IMX_GPIO_NR(3, 28)
+	}
+};
+static struct i2c_pads_info mx6dl_i2c_pad_info0 = {
+	.scl = {
+		.i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
+		.gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
+		.gp = IMX_GPIO_NR(3, 21)
+	},
+	.sda = {
+		.i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
+		.gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
+		.gp = IMX_GPIO_NR(3, 28)
+	}
+};
+
+/* I2C2: PMIC/PCIe Switch/PCIe Clock/Mezz */
+static struct i2c_pads_info mx6q_i2c_pad_info1 = {
+	.scl = {
+		.i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
+		.gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
+		.gp = IMX_GPIO_NR(4, 12)
+	},
+	.sda = {
+		.i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
+		.gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
+		.gp = IMX_GPIO_NR(4, 13)
+	}
+};
+static struct i2c_pads_info mx6dl_i2c_pad_info1 = {
+	.scl = {
+		.i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
+		.gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
+		.gp = IMX_GPIO_NR(4, 12)
+	},
+	.sda = {
+		.i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
+		.gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
+		.gp = IMX_GPIO_NR(4, 13)
+	}
+};
+
+/* I2C3: Misc/Expansion */
+static struct i2c_pads_info mx6q_i2c_pad_info2 = {
+	.scl = {
+		.i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
+		.gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
+		.gp = IMX_GPIO_NR(1, 3)
+	},
+	.sda = {
+		.i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC,
+		.gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC,
+		.gp = IMX_GPIO_NR(1, 6)
+	}
+};
+static struct i2c_pads_info mx6dl_i2c_pad_info2 = {
+	.scl = {
+		.i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
+		.gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC,
+		.gp = IMX_GPIO_NR(1, 3)
+	},
+	.sda = {
+		.i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC,
+		.gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC,
+		.gp = IMX_GPIO_NR(1, 6)
+	}
+};
+
+void setup_ventana_i2c(void)
+{
+	if (is_cpu_type(MXC_CPU_MX6Q)) {
+		setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info0);
+		setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1);
+		setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info2);
+	} else {
+		setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info0);
+		setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1);
+		setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info2);
+	}
+}
+
+/*
+ * Baseboard specific GPIO
+ */
+
+/* common to add baseboards */
+static iomux_v3_cfg_t const gw_gpio_pads[] = {
+	/* MSATA_EN */
+	IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
+	/* RS232_EN# */
+	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
+};
+
+/* prototype */
+static iomux_v3_cfg_t const gwproto_gpio_pads[] = {
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* RS485_EN */
+	IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	/* VID_EN */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* DIOI2C_DIS# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* PCICK_SSON */
+	IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
+};
+
+static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+
+	/* GPS_SHDN */
+	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
+	/* VID_PWR */
+	IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+};
+
+static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* GPS_SHDN */
+	IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
+	/* USBOTG_SEL */
+	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
+	/* VID_PWR */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
+	/* PCI_RST# (GW522x) */
+	IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+};
+
+static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	/* DIOI2C_DIS# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* GPS_SHDN */
+	IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
+	/* VID_EN */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+};
+
+static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* MIPI_DIO */
+	IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | DIO_PAD_CFG),
+	/* RS485_EN */
+	IOMUX_PADS(PAD_EIM_D24__GPIO3_IO24 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	/* DIOI2C_DIS# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
+	/* VID_EN */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
+};
+
+static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
+	/* PANLED# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+};
+
+static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
+	/* MX6_DIO[4:9] */
+	IOMUX_PADS(PAD_CSI0_PIXCLK__GPIO5_IO18 | DIO_PAD_CFG),
+	IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
+	IOMUX_PADS(PAD_CSI0_VSYNC__GPIO5_IO21 | DIO_PAD_CFG),
+	IOMUX_PADS(PAD_CSI0_DAT4__GPIO5_IO22 | DIO_PAD_CFG),
+	IOMUX_PADS(PAD_CSI0_DAT5__GPIO5_IO23 | DIO_PAD_CFG),
+	IOMUX_PADS(PAD_CSI0_DAT7__GPIO5_IO25 | DIO_PAD_CFG),
+	/* PCIEGBE1_OFF# */
+	IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | DIO_PAD_CFG),
+	/* PCIEGBE2_OFF# */
+	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+};
+
+
+/*
+ * Board Specific GPIO
+ */
+struct ventana gpio_cfg[GW_UNKNOWN] = {
+	/* GW5400proto */
+	{
+		.gpio_pads = gw54xx_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw54xx_gpio_pads)/2,
+		.dio_cfg = {
+			{
+				{ IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09) },
+				IMX_GPIO_NR(1, 9),
+				{ IOMUX_PADS(PAD_GPIO_9__PWM1_OUT) },
+				1
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+				IMX_GPIO_NR(1, 19),
+				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+				2
+			},
+			{
+				{ IOMUX_PADS(PAD_SD4_DAT1__GPIO2_IO09) },
+				IMX_GPIO_NR(2, 9),
+				{ IOMUX_PADS(PAD_SD4_DAT1__PWM3_OUT) },
+				3
+			},
+			{
+				{ IOMUX_PADS(PAD_SD4_DAT2__GPIO2_IO10) },
+				IMX_GPIO_NR(2, 10),
+				{ IOMUX_PADS(PAD_SD4_DAT2__PWM4_OUT) },
+				4
+			},
+		},
+		.num_gpios = 4,
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 10),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 29),
+		.mezz_pwren = IMX_GPIO_NR(4, 7),
+		.mezz_irq = IMX_GPIO_NR(4, 9),
+		.rs485en = IMX_GPIO_NR(3, 24),
+		.dioi2c_en = IMX_GPIO_NR(4,  5),
+		.pcie_sson = IMX_GPIO_NR(1, 20),
+	},
+
+	/* GW51xx */
+	{
+		.gpio_pads = gw51xx_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw51xx_gpio_pads)/2,
+		.dio_cfg = {
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+				IMX_GPIO_NR(1, 16),
+				{ 0, 0 },
+				0
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+				IMX_GPIO_NR(1, 19),
+				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+				2
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+				IMX_GPIO_NR(1, 17),
+				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+				3
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) },
+				IMX_GPIO_NR(1, 18),
+				{ IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) },
+				4
+			},
+		},
+		.num_gpios = 4,
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 10),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.gps_shdn = IMX_GPIO_NR(1, 2),
+		.vidin_en = IMX_GPIO_NR(5, 20),
+		.wdis = IMX_GPIO_NR(7, 12),
+	},
+
+	/* GW52xx */
+	{
+		.gpio_pads = gw52xx_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw52xx_gpio_pads)/2,
+		.dio_cfg = {
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+				IMX_GPIO_NR(1, 16),
+				{ 0, 0 },
+				0
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+				IMX_GPIO_NR(1, 19),
+				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+				2
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+				IMX_GPIO_NR(1, 17),
+				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+				3
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+				IMX_GPIO_NR(1, 20),
+				{ 0, 0 },
+				0
+			},
+		},
+		.num_gpios = 4,
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 29),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.gps_shdn = IMX_GPIO_NR(1, 27),
+		.vidin_en = IMX_GPIO_NR(3, 31),
+		.usb_sel = IMX_GPIO_NR(1, 2),
+		.wdis = IMX_GPIO_NR(7, 12),
+	},
+
+	/* GW53xx */
+	{
+		.gpio_pads = gw53xx_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw53xx_gpio_pads)/2,
+		.dio_cfg = {
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+				IMX_GPIO_NR(1, 16),
+				{ 0, 0 },
+				0
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+				IMX_GPIO_NR(1, 19),
+				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+				2
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+				IMX_GPIO_NR(1, 17),
+				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+				3
+			},
+			{
+				{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+				IMX_GPIO_NR(1, 20),
+				{ 0, 0 },
+				0
+			},
+		},
+		.num_gpios = 4,
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 29),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.gps_shdn = IMX_GPIO_NR(1, 27),
+		.vidin_en = IMX_GPIO_NR(3, 31),
+		.wdis = IMX_GPIO_NR(7, 12),
+	},
+
+	/* GW54xx */
+	{
+		.gpio_pads = gw54xx_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw54xx_gpio_pads)/2,
+		.dio_cfg = {
+			{
+				{ IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09) },
+				IMX_GPIO_NR(1, 9),
+				{ IOMUX_PADS(PAD_GPIO_9__PWM1_OUT) },
+				1
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+				IMX_GPIO_NR(1, 19),
+				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+				2
+			},
+			{
+				{ IOMUX_PADS(PAD_SD4_DAT1__GPIO2_IO09) },
+				IMX_GPIO_NR(2, 9),
+				{ IOMUX_PADS(PAD_SD4_DAT1__PWM3_OUT) },
+				3
+			},
+			{
+				{ IOMUX_PADS(PAD_SD4_DAT2__GPIO2_IO10) },
+				IMX_GPIO_NR(2, 10),
+				{ IOMUX_PADS(PAD_SD4_DAT2__PWM4_OUT) },
+				4
+			},
+		},
+		.num_gpios = 4,
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 29),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.rs485en = IMX_GPIO_NR(7, 1),
+		.vidin_en = IMX_GPIO_NR(3, 31),
+		.dioi2c_en = IMX_GPIO_NR(4,  5),
+		.pcie_sson = IMX_GPIO_NR(1, 20),
+		.wdis = IMX_GPIO_NR(5, 17),
+	},
+
+	/* GW551x */
+	{
+		.gpio_pads = gw551x_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw551x_gpio_pads)/2,
+		.dio_cfg = {
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+				IMX_GPIO_NR(1, 16),
+				{ 0, 0 },
+				0
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+				IMX_GPIO_NR(1, 19),
+				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+				2
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+				IMX_GPIO_NR(1, 17),
+				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+				3
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) },
+				IMX_GPIO_NR(1, 18),
+				{ IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) },
+				4
+			},
+		},
+		.num_gpios = 2,
+		.leds = {
+			IMX_GPIO_NR(4, 7),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.wdis = IMX_GPIO_NR(7, 12),
+	},
+
+	/* GW552x */
+	{
+		.gpio_pads = gw552x_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw552x_gpio_pads)/2,
+		.dio_cfg = {
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+				IMX_GPIO_NR(1, 19),
+				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+				2
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+				IMX_GPIO_NR(1, 17),
+				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+				3
+			},
+		},
+		.num_gpios = 4,
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 29),
+		.wdis = IMX_GPIO_NR(7, 12),
+	},
+};
+
+void setup_iomux_gpio(int board, struct ventana_board_info *info)
+{
+	int i;
+
+	/* iomux common to all Ventana boards */
+	SETUP_IOMUX_PADS(gw_gpio_pads);
+
+	/* OTG power off */
+	gpio_request(GP_USB_OTG_PWR, "usbotg_pwr");
+	gpio_direction_output(GP_USB_OTG_PWR, 0);
+
+	/* MSATA Enable - default to PCI */
+	gpio_request(GP_MSATA_SEL, "msata_en");
+	gpio_direction_output(GP_MSATA_SEL, 0);
+
+	/* RS232_EN# */
+	gpio_request(GP_RS232_EN, "rs232_en");
+	gpio_direction_output(GP_RS232_EN, 0);
+
+	if (board >= GW_UNKNOWN)
+		return;
+
+	/* board specific iomux */
+	imx_iomux_v3_setup_multiple_pads(gpio_cfg[board].gpio_pads,
+					 gpio_cfg[board].num_pads);
+
+	/* GW522x Uses GPIO3_IO23 for PCIE_RST# */
+	if (board == GW52xx && info->model[4] == '2')
+		gpio_cfg[board].pcie_rst = IMX_GPIO_NR(3, 23);
+
+	/* assert PCI_RST# */
+	gpio_request(gpio_cfg[board].pcie_rst, "pci_rst#");
+	gpio_direction_output(gpio_cfg[board].pcie_rst, 0);
+
+	/* turn off (active-high) user LED's */
+	for (i = 0; i < ARRAY_SIZE(gpio_cfg[board].leds); i++) {
+		char name[16];
+		if (gpio_cfg[board].leds[i]) {
+			sprintf(name, "led_user%d", i);
+			gpio_request(gpio_cfg[board].leds[i], name);
+			gpio_direction_output(gpio_cfg[board].leds[i], 1);
+		}
+	}
+
+	/* Expansion Mezzanine IO */
+	if (gpio_cfg[board].mezz_pwren) {
+		gpio_request(gpio_cfg[board].mezz_pwren, "mezz_pwr");
+		gpio_direction_output(gpio_cfg[board].mezz_pwren, 0);
+	}
+	if (gpio_cfg[board].mezz_irq) {
+		gpio_request(gpio_cfg[board].mezz_irq, "mezz_irq#");
+		gpio_direction_input(gpio_cfg[board].mezz_irq);
+	}
+
+	/* RS485 Transmit Enable */
+	if (gpio_cfg[board].rs485en) {
+		gpio_request(gpio_cfg[board].rs485en, "rs485_en");
+		gpio_direction_output(gpio_cfg[board].rs485en, 0);
+	}
+
+	/* GPS_SHDN */
+	if (gpio_cfg[board].gps_shdn) {
+		gpio_request(gpio_cfg[board].gps_shdn, "gps_shdn");
+		gpio_direction_output(gpio_cfg[board].gps_shdn, 1);
+	}
+
+	/* Analog video codec power enable */
+	if (gpio_cfg[board].vidin_en) {
+		gpio_request(gpio_cfg[board].vidin_en, "anavidin_en");
+		gpio_direction_output(gpio_cfg[board].vidin_en, 1);
+	}
+
+	/* DIOI2C_DIS# */
+	if (gpio_cfg[board].dioi2c_en) {
+		gpio_request(gpio_cfg[board].dioi2c_en, "dioi2c_dis#");
+		gpio_direction_output(gpio_cfg[board].dioi2c_en, 0);
+	}
+
+	/* PCICK_SSON: disable spread-spectrum clock */
+	if (gpio_cfg[board].pcie_sson) {
+		gpio_request(gpio_cfg[board].pcie_sson, "pci_sson");
+		gpio_direction_output(gpio_cfg[board].pcie_sson, 0);
+	}
+
+	/* USBOTG mux routing */
+	if (gpio_cfg[board].usb_sel) {
+		gpio_request(gpio_cfg[board].usb_sel, "usb_pcisel");
+		gpio_direction_output(gpio_cfg[board].usb_sel, 0);
+	}
+
+	/* PCISKT_WDIS# (Wireless disable GPIO to miniPCIe sockets) */
+	if (gpio_cfg[board].wdis) {
+		gpio_request(gpio_cfg[board].wdis, "wlan_dis");
+		gpio_direction_output(gpio_cfg[board].wdis, 1);
+	}
+}
+
+/* setup GPIO pinmux and default configuration per baseboard and env */
+void setup_board_gpio(int board, struct ventana_board_info *info)
+{
+	const char *s;
+	char arg[10];
+	size_t len;
+	int i;
+	int quiet = simple_strtol(getenv("quiet"), NULL, 10);
+
+	if (board >= GW_UNKNOWN)
+		return;
+
+	/* RS232_EN# */
+	gpio_direction_output(GP_RS232_EN, (hwconfig("rs232")) ? 0 : 1);
+
+	/* MSATA Enable */
+	if (is_cpu_type(MXC_CPU_MX6Q) &&
+	    test_bit(EECONFIG_SATA, info->config)) {
+		gpio_direction_output(GP_MSATA_SEL,
+				      (hwconfig("msata")) ?  1 : 0);
+	}
+
+	/* USBOTG Select (PCISKT or FrontPanel) */
+	if (gpio_cfg[board].usb_sel) {
+		gpio_direction_output(gpio_cfg[board].usb_sel,
+				      (hwconfig("usb_pcisel")) ? 1 : 0);
+	}
+
+	/*
+	 * Configure DIO pinmux/padctl registers
+	 * see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions
+	 */
+	for (i = 0; i < 4; i++) {
+		struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i];
+		iomux_v3_cfg_t ctrl = DIO_PAD_CFG;
+		unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1;
+
+		if (!cfg->gpio_padmux[0] && !cfg->gpio_padmux[1])
+			continue;
+		sprintf(arg, "dio%d", i);
+		if (!hwconfig(arg))
+			continue;
+		s = hwconfig_subarg(arg, "padctrl", &len);
+		if (s) {
+			ctrl = MUX_PAD_CTRL(simple_strtoul(s, NULL, 16)
+					    & 0x1ffff) | MUX_MODE_SION;
+		}
+		if (hwconfig_subarg_cmp(arg, "mode", "gpio")) {
+			if (!quiet) {
+				printf("DIO%d:  GPIO%d_IO%02d (gpio-%d)\n", i,
+				       (cfg->gpio_param/32)+1,
+				       cfg->gpio_param%32,
+				       cfg->gpio_param);
+			}
+			imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] |
+					       ctrl);
+			gpio_requestf(cfg->gpio_param, "dio%d", i);
+			gpio_direction_input(cfg->gpio_param);
+		} else if (hwconfig_subarg_cmp("dio2", "mode", "pwm") &&
+			   cfg->pwm_padmux) {
+			if (!quiet)
+				printf("DIO%d:  pwm%d\n", i, cfg->pwm_param);
+			imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] |
+					       MUX_PAD_CTRL(ctrl));
+		}
+	}
+
+	if (!quiet) {
+		if (is_cpu_type(MXC_CPU_MX6Q) &&
+		    (test_bit(EECONFIG_SATA, info->config))) {
+			printf("MSATA: %s\n", (hwconfig("msata") ?
+			       "enabled" : "disabled"));
+		}
+		printf("RS232: %s\n", (hwconfig("rs232")) ?
+		       "enabled" : "disabled");
+	}
+}
+
+/* setup board specific PMIC */
+void setup_pmic(int board)
+{
+	struct pmic *p;
+	u32 reg;
+
+	/* configure PFUZE100 PMIC */
+	if (board == GW54xx || board == GW54proto) {
+		power_pfuze100_init(CONFIG_I2C_PMIC);
+		p = pmic_get("PFUZE100");
+		if (p && !pmic_probe(p)) {
+			pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
+			printf("PMIC:  PFUZE100 ID=0x%02x\n", reg);
+
+			/* Set VGEN1 to 1.5V and enable */
+			pmic_reg_read(p, PFUZE100_VGEN1VOL, &reg);
+			reg &= ~(LDO_VOL_MASK);
+			reg |= (LDOA_1_50V | LDO_EN);
+			pmic_reg_write(p, PFUZE100_VGEN1VOL, reg);
+
+			/* Set SWBST to 5.0V and enable */
+			pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg);
+			reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
+			reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
+			pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
+		}
+	}
+
+	/* configure LTC3676 PMIC */
+	else {
+		power_ltc3676_init(CONFIG_I2C_PMIC);
+		p = pmic_get("LTC3676_PMIC");
+		if (p && !pmic_probe(p)) {
+			puts("PMIC:  LTC3676\n");
+			/*
+			 * set board-specific scalar for max CPU frequency
+			 * per CPU based on the LDO enabled Operating Ranges
+			 * defined in the respective IMX6DQ and IMX6SDL
+			 * datasheets. The voltage resulting from the R1/R2
+			 * feedback inputs on Ventana is 1308mV. Note that this
+			 * is a bit shy of the Vmin of 1350mV in the datasheet
+			 * for LDO enabled mode but is as high as we can go.
+			 *
+			 * We will rely on an OS kernel driver to properly
+			 * regulate these per CPU operating point and use LDO
+			 * bypass mode when using the higher frequency
+			 * operating points to compensate as LDO bypass mode
+			 * allows the rails be 125mV lower.
+			 */
+			/* mask PGOOD during SW1 transition */
+			pmic_reg_write(p, LTC3676_DVB1B,
+				       0x1f | LTC3676_PGOOD_MASK);
+			/* set SW1 (VDD_SOC) */
+			pmic_reg_write(p, LTC3676_DVB1A, 0x1f);
+
+			/* mask PGOOD during SW3 transition */
+			pmic_reg_write(p, LTC3676_DVB3B,
+				       0x1f | LTC3676_PGOOD_MASK);
+			/* set SW3 (VDD_ARM) */
+			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
+		}
+	}
+}
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
new file mode 100644
index 0000000..a303b55
--- /dev/null
+++ b/board/gateworks/gw_ventana/common.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2013 Gateworks Corporation
+ *
+ * Author: Tim Harvey <tharvey@gateworks.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _GWVENTANA_COMMON_H_
+#define _GWVENTANA_COMMON_H_
+
+#include "ventana_eeprom.h"
+
+/* GPIO's common to all baseboards */
+#define GP_PHY_RST	IMX_GPIO_NR(1, 30)
+#define GP_USB_OTG_PWR	IMX_GPIO_NR(3, 22)
+#define GP_SD3_CD	IMX_GPIO_NR(7, 0)
+#define GP_RS232_EN	IMX_GPIO_NR(2, 11)
+#define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
+
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW |		\
+	PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+#define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED	  |		\
+	PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
+
+#define SPI_PAD_CTRL (PAD_CTL_HYS |				\
+	PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_40ohm     | PAD_CTL_SRE_FAST)
+
+#define DIO_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define I2C_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
+	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define IRQ_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define DIO_PAD_CFG   (MUX_PAD_CTRL(DIO_PAD_CTRL) | MUX_MODE_SION)
+
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+
+/*
+ * each baseboard has 4 user configurable Digital IO lines which can
+ * be pinmuxed as a GPIO or in some cases a PWM
+ */
+struct dio_cfg {
+	iomux_v3_cfg_t gpio_padmux[2];
+	unsigned gpio_param;
+	iomux_v3_cfg_t pwm_padmux[2];
+	unsigned pwm_param;
+};
+
+struct ventana {
+	/* pinmux */
+	iomux_v3_cfg_t const *gpio_pads;
+	int num_pads;
+	/* DIO pinmux/val */
+	struct dio_cfg dio_cfg[4];
+	int num_gpios;
+	/* various gpios (0 if non-existent) */
+	int leds[3];
+	int pcie_rst;
+	int mezz_pwren;
+	int mezz_irq;
+	int rs485en;
+	int gps_shdn;
+	int vidin_en;
+	int dioi2c_en;
+	int pcie_sson;
+	int usb_sel;
+	int wdis;
+};
+
+extern struct ventana gpio_cfg[GW_UNKNOWN];
+
+/* configure i2c iomux */
+void setup_ventana_i2c(void);
+/* configure uart iomux */
+void setup_iomux_uart(void);
+/* conifgure PMIC */
+void setup_pmic(int board);
+/* configure gpio iomux/defaults */
+void setup_iomux_gpio(int board, struct ventana_board_info *);
+/* late setup of GPIO (configuration per baseboard and env) */
+void setup_board_gpio(int board, struct ventana_board_info *);
+
+#endif /* #ifndef _GWVENTANA_COMMON_H_ */
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index cf866ca..8163d38 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -7,30 +7,26 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
+#include <asm/arch/crm_regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/mxc_hdmi.h>
-#include <asm/arch/crm_regs.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
-#include <asm/imx-common/iomux-v3.h>
-#include <asm/imx-common/mxc_i2c.h>
 #include <asm/imx-common/boot_mode.h>
 #include <asm/imx-common/sata.h>
 #include <asm/imx-common/spi.h>
 #include <asm/imx-common/video.h>
+#include <asm/io.h>
+#include <dm.h>
 #include <dm/platform_data/serial_mxc.h>
-#include <jffs2/load_kernel.h>
-#include <hwconfig.h>
 #include <i2c.h>
-#include <linux/ctype.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>
+#include <jffs2/load_kernel.h>
+#include <linux/ctype.h>
 #include <miiphy.h>
-#include <mmc.h>
 #include <mtd_node.h>
 #include <netdev.h>
 #include <pci.h>
@@ -42,47 +38,10 @@
 #include <spi_flash.h>
 
 #include "gsc.h"
-#include "ventana_eeprom.h"
+#include "common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* GPIO's common to all baseboards */
-#define GP_PHY_RST	IMX_GPIO_NR(1, 30)
-#define GP_USB_OTG_PWR	IMX_GPIO_NR(3, 22)
-#define GP_SD3_CD	IMX_GPIO_NR(7, 0)
-#define GP_RS232_EN	IMX_GPIO_NR(2, 11)
-#define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
-
-#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW |		\
-	PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED	  |		\
-	PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS |				\
-	PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_40ohm     | PAD_CTL_SRE_FAST)
-
-#define DIO_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
-	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define IRQ_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
-	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
-
-#define DIO_PAD_CFG   (MUX_PAD_CTRL(DIO_PAD_CTRL) | MUX_MODE_SION)
-
 
 /*
  * EEPROM board info struct populated by read_eeprom so that we only have to
@@ -92,98 +51,6 @@ struct ventana_board_info ventana_info;
 
 static int board_type;
 
-/* UART1: Function varies per baseboard */
-static iomux_v3_cfg_t const uart1_pads[] = {
-	IOMUX_PADS(PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
-
-/* UART2: Serial Console */
-static iomux_v3_cfg_t const uart2_pads[] = {
-	IOMUX_PADS(PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
-
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-/* I2C1: GSC */
-static struct i2c_pads_info mx6q_i2c_pad_info0 = {
-	.scl = {
-		.i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
-		.gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
-		.gp = IMX_GPIO_NR(3, 21)
-	},
-	.sda = {
-		.i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
-		.gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
-		.gp = IMX_GPIO_NR(3, 28)
-	}
-};
-static struct i2c_pads_info mx6dl_i2c_pad_info0 = {
-	.scl = {
-		.i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
-		.gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
-		.gp = IMX_GPIO_NR(3, 21)
-	},
-	.sda = {
-		.i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
-		.gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
-		.gp = IMX_GPIO_NR(3, 28)
-	}
-};
-
-/* I2C2: PMIC/PCIe Switch/PCIe Clock/Mezz */
-static struct i2c_pads_info mx6q_i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
-		.gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
-		.gp = IMX_GPIO_NR(4, 12)
-	},
-	.sda = {
-		.i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
-		.gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-		.gp = IMX_GPIO_NR(4, 13)
-	}
-};
-static struct i2c_pads_info mx6dl_i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
-		.gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
-		.gp = IMX_GPIO_NR(4, 12)
-	},
-	.sda = {
-		.i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
-		.gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-		.gp = IMX_GPIO_NR(4, 13)
-	}
-};
-
-/* I2C3: Misc/Expansion */
-static struct i2c_pads_info mx6q_i2c_pad_info2 = {
-	.scl = {
-		.i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
-		.gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
-		.gp = IMX_GPIO_NR(1, 3)
-	},
-	.sda = {
-		.i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC,
-		.gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC,
-		.gp = IMX_GPIO_NR(1, 6)
-	}
-};
-static struct i2c_pads_info mx6dl_i2c_pad_info2 = {
-	.scl = {
-		.i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
-		.gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC,
-		.gp = IMX_GPIO_NR(1, 3)
-	},
-	.sda = {
-		.i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC,
-		.gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC,
-		.gp = IMX_GPIO_NR(1, 6)
-	}
-};
-
 /* MMC */
 static iomux_v3_cfg_t const usdhc3_pads[] = {
 	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -280,12 +147,6 @@ static void setup_iomux_enet(int gpio)
 	gpio_set_value(gpio, 1);
 }
 
-static void setup_iomux_uart(void)
-{
-	SETUP_IOMUX_PADS(uart1_pads);
-	SETUP_IOMUX_PADS(uart2_pads);
-}
-
 #ifdef CONFIG_USB_EHCI_MX6
 static iomux_v3_cfg_t const usb_pads[] = {
 	IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID   | DIO_PAD_CFG),
@@ -329,7 +190,6 @@ int board_ehci_power(int port, int on)
 {
 	if (port)
 		return 0;
-	gpio_request(GP_USB_OTG_PWR, "usb_otg_pwr");
 	gpio_set_value(GP_USB_OTG_PWR, on);
 	return 0;
 }
@@ -605,699 +465,13 @@ static void setup_display(void)
 }
 #endif /* CONFIG_VIDEO_IPUV3 */
 
-/*
- * Baseboard specific GPIO
- */
-
-/* common to add baseboards */
-static iomux_v3_cfg_t const gw_gpio_pads[] = {
-	/* MSATA_EN */
-	IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
-	/* RS232_EN# */
-	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
-};
-
-/* prototype */
-static iomux_v3_cfg_t const gwproto_gpio_pads[] = {
-	/* PANLEDG# */
-	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
-	/* PANLEDR# */
-	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
-	/* LOCLED# */
-	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
-	/* RS485_EN */
-	IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
-	/* IOEXP_PWREN# */
-	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
-	/* IOEXP_IRQ# */
-	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
-	/* VID_EN */
-	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
-	/* DIOI2C_DIS# */
-	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
-	/* PCICK_SSON */
-	IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | DIO_PAD_CFG),
-	/* PCI_RST# */
-	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
-};
-
-static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
-	/* PANLEDG# */
-	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
-	/* PANLEDR# */
-	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
-	/* IOEXP_PWREN# */
-	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
-	/* IOEXP_IRQ# */
-	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
-
-	/* GPS_SHDN */
-	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
-	/* VID_PWR */
-	IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
-	/* PCI_RST# */
-	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
-	/* PCIESKT_WDIS# */
-	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
-};
-
-static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
-	/* PANLEDG# */
-	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
-	/* PANLEDR# */
-	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
-	/* IOEXP_PWREN# */
-	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
-	/* IOEXP_IRQ# */
-	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
-
-	/* MX6_LOCLED# */
-	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
-	/* GPS_SHDN */
-	IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
-	/* USBOTG_SEL */
-	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
-	/* VID_PWR */
-	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
-	/* PCI_RST# */
-	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
-	/* PCI_RST# (GW522x) */
-	IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | DIO_PAD_CFG),
-	/* PCIESKT_WDIS# */
-	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
-};
-
-static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
-	/* PANLEDG# */
-	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
-	/* PANLEDR# */
-	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
-	/* MX6_LOCLED# */
-	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
-	/* IOEXP_PWREN# */
-	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
-	/* IOEXP_IRQ# */
-	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
-	/* DIOI2C_DIS# */
-	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
-	/* GPS_SHDN */
-	IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG),
-	/* VID_EN */
-	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
-	/* PCI_RST# */
-	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
-	/* PCIESKT_WDIS# */
-	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
-};
-
-static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
-	/* PANLEDG# */
-	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
-	/* PANLEDR# */
-	IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
-	/* MX6_LOCLED# */
-	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
-	/* MIPI_DIO */
-	IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | DIO_PAD_CFG),
-	/* RS485_EN */
-	IOMUX_PADS(PAD_EIM_D24__GPIO3_IO24 | DIO_PAD_CFG),
-	/* IOEXP_PWREN# */
-	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
-	/* IOEXP_IRQ# */
-	IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
-	/* DIOI2C_DIS# */
-	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
-	/* PCI_RST# */
-	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
-	/* VID_EN */
-	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
-	/* PCIESKT_WDIS# */
-	IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
-};
-
-static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
-	/* PANLED# */
-	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
-	/* PCI_RST# */
-	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
-	/* PCIESKT_WDIS# */
-	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
-};
-
-static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
-	/* PANLEDG# */
-	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
-	/* PANLEDR# */
-	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
-	/* MX6_LOCLED# */
-	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
-	/* PCI_RST# */
-	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
-	/* MX6_DIO[4:9] */
-	IOMUX_PADS(PAD_CSI0_PIXCLK__GPIO5_IO18 | DIO_PAD_CFG),
-	IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
-	IOMUX_PADS(PAD_CSI0_VSYNC__GPIO5_IO21 | DIO_PAD_CFG),
-	IOMUX_PADS(PAD_CSI0_DAT4__GPIO5_IO22 | DIO_PAD_CFG),
-	IOMUX_PADS(PAD_CSI0_DAT5__GPIO5_IO23 | DIO_PAD_CFG),
-	IOMUX_PADS(PAD_CSI0_DAT7__GPIO5_IO25 | DIO_PAD_CFG),
-	/* PCIEGBE1_OFF# */
-	IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | DIO_PAD_CFG),
-	/* PCIEGBE2_OFF# */
-	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
-	/* PCIESKT_WDIS# */
-	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
-};
-
-/*
- * each baseboard has 4 user configurable Digital IO lines which can
- * be pinmuxed as a GPIO or in some cases a PWM
- */
-struct dio_cfg {
-	iomux_v3_cfg_t gpio_padmux[2];
-	unsigned gpio_param;
-	iomux_v3_cfg_t pwm_padmux[2];
-	unsigned pwm_param;
-};
-
-struct ventana {
-	/* pinmux */
-	iomux_v3_cfg_t const *gpio_pads;
-	int num_pads;
-	/* DIO pinmux/val */
-	struct dio_cfg dio_cfg[4];
-	int num_gpios;
-	/* various gpios (0 if non-existent) */
-	int leds[3];
-	int pcie_rst;
-	int mezz_pwren;
-	int mezz_irq;
-	int rs485en;
-	int gps_shdn;
-	int vidin_en;
-	int dioi2c_en;
-	int pcie_sson;
-	int usb_sel;
-	int wdis;
-};
-
-static struct ventana gpio_cfg[] = {
-	/* GW5400proto */
-	{
-		.gpio_pads = gw54xx_gpio_pads,
-		.num_pads = ARRAY_SIZE(gw54xx_gpio_pads)/2,
-		.dio_cfg = {
-			{
-				{ IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09) },
-				IMX_GPIO_NR(1, 9),
-				{ IOMUX_PADS(PAD_GPIO_9__PWM1_OUT) },
-				1
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
-				IMX_GPIO_NR(1, 19),
-				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
-				2
-			},
-			{
-				{ IOMUX_PADS(PAD_SD4_DAT1__GPIO2_IO09) },
-				IMX_GPIO_NR(2, 9),
-				{ IOMUX_PADS(PAD_SD4_DAT1__PWM3_OUT) },
-				3
-			},
-			{
-				{ IOMUX_PADS(PAD_SD4_DAT2__GPIO2_IO10) },
-				IMX_GPIO_NR(2, 10),
-				{ IOMUX_PADS(PAD_SD4_DAT2__PWM4_OUT) },
-				4
-			},
-		},
-		.num_gpios = 4,
-		.leds = {
-			IMX_GPIO_NR(4, 6),
-			IMX_GPIO_NR(4, 10),
-			IMX_GPIO_NR(4, 15),
-		},
-		.pcie_rst = IMX_GPIO_NR(1, 29),
-		.mezz_pwren = IMX_GPIO_NR(4, 7),
-		.mezz_irq = IMX_GPIO_NR(4, 9),
-		.rs485en = IMX_GPIO_NR(3, 24),
-		.dioi2c_en = IMX_GPIO_NR(4,  5),
-		.pcie_sson = IMX_GPIO_NR(1, 20),
-	},
-
-	/* GW51xx */
-	{
-		.gpio_pads = gw51xx_gpio_pads,
-		.num_pads = ARRAY_SIZE(gw51xx_gpio_pads)/2,
-		.dio_cfg = {
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
-				IMX_GPIO_NR(1, 16),
-				{ 0, 0 },
-				0
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
-				IMX_GPIO_NR(1, 19),
-				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
-				2
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
-				IMX_GPIO_NR(1, 17),
-				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
-				3
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) },
-				IMX_GPIO_NR(1, 18),
-				{ IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) },
-				4
-			},
-		},
-		.num_gpios = 4,
-		.leds = {
-			IMX_GPIO_NR(4, 6),
-			IMX_GPIO_NR(4, 10),
-		},
-		.pcie_rst = IMX_GPIO_NR(1, 0),
-		.mezz_pwren = IMX_GPIO_NR(2, 19),
-		.mezz_irq = IMX_GPIO_NR(2, 18),
-		.gps_shdn = IMX_GPIO_NR(1, 2),
-		.vidin_en = IMX_GPIO_NR(5, 20),
-		.wdis = IMX_GPIO_NR(7, 12),
-	},
-
-	/* GW52xx */
-	{
-		.gpio_pads = gw52xx_gpio_pads,
-		.num_pads = ARRAY_SIZE(gw52xx_gpio_pads)/2,
-		.dio_cfg = {
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
-				IMX_GPIO_NR(1, 16),
-				{ 0, 0 },
-				0
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
-				IMX_GPIO_NR(1, 19),
-				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
-				2
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
-				IMX_GPIO_NR(1, 17),
-				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
-				3
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
-				IMX_GPIO_NR(1, 20),
-				{ 0, 0 },
-				0
-			},
-		},
-		.num_gpios = 4,
-		.leds = {
-			IMX_GPIO_NR(4, 6),
-			IMX_GPIO_NR(4, 7),
-			IMX_GPIO_NR(4, 15),
-		},
-		.pcie_rst = IMX_GPIO_NR(1, 29),
-		.mezz_pwren = IMX_GPIO_NR(2, 19),
-		.mezz_irq = IMX_GPIO_NR(2, 18),
-		.gps_shdn = IMX_GPIO_NR(1, 27),
-		.vidin_en = IMX_GPIO_NR(3, 31),
-		.usb_sel = IMX_GPIO_NR(1, 2),
-		.wdis = IMX_GPIO_NR(7, 12),
-	},
-
-	/* GW53xx */
-	{
-		.gpio_pads = gw53xx_gpio_pads,
-		.num_pads = ARRAY_SIZE(gw53xx_gpio_pads)/2,
-		.dio_cfg = {
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
-				IMX_GPIO_NR(1, 16),
-				{ 0, 0 },
-				0
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
-				IMX_GPIO_NR(1, 19),
-				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
-				2
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
-				IMX_GPIO_NR(1, 17),
-				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
-				3
-			},
-			{
-				{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
-				IMX_GPIO_NR(1, 20),
-				{ 0, 0 },
-				0
-			},
-		},
-		.num_gpios = 4,
-		.leds = {
-			IMX_GPIO_NR(4, 6),
-			IMX_GPIO_NR(4, 7),
-			IMX_GPIO_NR(4, 15),
-		},
-		.pcie_rst = IMX_GPIO_NR(1, 29),
-		.mezz_pwren = IMX_GPIO_NR(2, 19),
-		.mezz_irq = IMX_GPIO_NR(2, 18),
-		.gps_shdn = IMX_GPIO_NR(1, 27),
-		.vidin_en = IMX_GPIO_NR(3, 31),
-		.wdis = IMX_GPIO_NR(7, 12),
-	},
-
-	/* GW54xx */
-	{
-		.gpio_pads = gw54xx_gpio_pads,
-		.num_pads = ARRAY_SIZE(gw54xx_gpio_pads)/2,
-		.dio_cfg = {
-			{
-				{ IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09) },
-				IMX_GPIO_NR(1, 9),
-				{ IOMUX_PADS(PAD_GPIO_9__PWM1_OUT) },
-				1
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
-				IMX_GPIO_NR(1, 19),
-				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
-				2
-			},
-			{
-				{ IOMUX_PADS(PAD_SD4_DAT1__GPIO2_IO09) },
-				IMX_GPIO_NR(2, 9),
-				{ IOMUX_PADS(PAD_SD4_DAT1__PWM3_OUT) },
-				3
-			},
-			{
-				{ IOMUX_PADS(PAD_SD4_DAT2__GPIO2_IO10) },
-				IMX_GPIO_NR(2, 10),
-				{ IOMUX_PADS(PAD_SD4_DAT2__PWM4_OUT) },
-				4
-			},
-		},
-		.num_gpios = 4,
-		.leds = {
-			IMX_GPIO_NR(4, 6),
-			IMX_GPIO_NR(4, 7),
-			IMX_GPIO_NR(4, 15),
-		},
-		.pcie_rst = IMX_GPIO_NR(1, 29),
-		.mezz_pwren = IMX_GPIO_NR(2, 19),
-		.mezz_irq = IMX_GPIO_NR(2, 18),
-		.rs485en = IMX_GPIO_NR(7, 1),
-		.vidin_en = IMX_GPIO_NR(3, 31),
-		.dioi2c_en = IMX_GPIO_NR(4,  5),
-		.pcie_sson = IMX_GPIO_NR(1, 20),
-		.wdis = IMX_GPIO_NR(5, 17),
-	},
-
-	/* GW551x */
-	{
-		.gpio_pads = gw551x_gpio_pads,
-		.num_pads = ARRAY_SIZE(gw551x_gpio_pads)/2,
-		.dio_cfg = {
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
-				IMX_GPIO_NR(1, 16),
-				{ 0, 0 },
-				0
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
-				IMX_GPIO_NR(1, 19),
-				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
-				2
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
-				IMX_GPIO_NR(1, 17),
-				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
-				3
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) },
-				IMX_GPIO_NR(1, 18),
-				{ IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) },
-				4
-			},
-		},
-		.num_gpios = 2,
-		.leds = {
-			IMX_GPIO_NR(4, 7),
-		},
-		.pcie_rst = IMX_GPIO_NR(1, 0),
-		.wdis = IMX_GPIO_NR(7, 12),
-	},
-
-	/* GW552x */
-	{
-		.gpio_pads = gw552x_gpio_pads,
-		.num_pads = ARRAY_SIZE(gw552x_gpio_pads)/2,
-		.dio_cfg = {
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
-				IMX_GPIO_NR(1, 19),
-				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
-				2
-			},
-			{
-				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
-				IMX_GPIO_NR(1, 17),
-				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
-				3
-			},
-		},
-		.num_gpios = 4,
-		.leds = {
-			IMX_GPIO_NR(4, 6),
-			IMX_GPIO_NR(4, 7),
-			IMX_GPIO_NR(4, 15),
-		},
-		.pcie_rst = IMX_GPIO_NR(1, 29),
-		.wdis = IMX_GPIO_NR(7, 12),
-	},
-};
-
 /* setup board specific PMIC */
 int power_init_board(void)
 {
-	struct pmic *p;
-	u32 reg;
-
-	/* configure PFUZE100 PMIC */
-	if (board_type == GW54xx || board_type == GW54proto) {
-		power_pfuze100_init(CONFIG_I2C_PMIC);
-		p = pmic_get("PFUZE100");
-		if (p && !pmic_probe(p)) {
-			pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
-			printf("PMIC:  PFUZE100 ID=0x%02x\n", reg);
-
-			/* Set VGEN1 to 1.5V and enable */
-			pmic_reg_read(p, PFUZE100_VGEN1VOL, &reg);
-			reg &= ~(LDO_VOL_MASK);
-			reg |= (LDOA_1_50V | LDO_EN);
-			pmic_reg_write(p, PFUZE100_VGEN1VOL, reg);
-
-			/* Set SWBST to 5.0V and enable */
-			pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg);
-			reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
-			reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
-			pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
-		}
-	}
-
-	/* configure LTC3676 PMIC */
-	else {
-		power_ltc3676_init(CONFIG_I2C_PMIC);
-		p = pmic_get("LTC3676_PMIC");
-		if (p && !pmic_probe(p)) {
-			puts("PMIC:  LTC3676\n");
-			/*
-			 * set board-specific scalar for max CPU frequency
-			 * per CPU based on the LDO enabled Operating Ranges
-			 * defined in the respective IMX6DQ and IMX6SDL
-			 * datasheets. The voltage resulting from the R1/R2
-			 * feedback inputs on Ventana is 1308mV. Note that this
-			 * is a bit shy of the Vmin of 1350mV in the datasheet
-			 * for LDO enabled mode but is as high as we can go.
-			 *
-			 * We will rely on an OS kernel driver to properly
-			 * regulate these per CPU operating point and use LDO
-			 * bypass mode when using the higher frequency
-			 * operating points to compensate as LDO bypass mode
-			 * allows the rails be 125mV lower.
-			 */
-			/* mask PGOOD during SW1 transition */
-			pmic_reg_write(p, LTC3676_DVB1B,
-				       0x1f | LTC3676_PGOOD_MASK);
-			/* set SW1 (VDD_SOC) */
-			pmic_reg_write(p, LTC3676_DVB1A, 0x1f);
-
-			/* mask PGOOD during SW3 transition */
-			pmic_reg_write(p, LTC3676_DVB3B,
-				       0x1f | LTC3676_PGOOD_MASK);
-			/* set SW3 (VDD_ARM) */
-			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
-		}
-	}
-
+	setup_pmic(board_type);
 	return 0;
 }
 
-/* setup GPIO pinmux and default configuration per baseboard */
-static void setup_board_gpio(int board)
-{
-	struct ventana_board_info *info = &ventana_info;
-	const char *s;
-	char arg[10];
-	size_t len;
-	int i;
-	int quiet = simple_strtol(getenv("quiet"), NULL, 10);
-
-	if (board >= GW_UNKNOWN)
-		return;
-
-	/* RS232_EN# */
-	gpio_request(GP_RS232_EN, "rs232_en");
-	gpio_direction_output(GP_RS232_EN, (hwconfig("rs232")) ? 0 : 1);
-
-	/* MSATA Enable */
-	if (is_cpu_type(MXC_CPU_MX6Q) &&
-	    test_bit(EECONFIG_SATA, info->config)) {
-		gpio_direction_output(GP_MSATA_SEL,
-				      (hwconfig("msata")) ?  1 : 0);
-	}
-
-#if !defined(CONFIG_CMD_PCI)
-	/* assert PCI_RST# (released by OS when clock is valid) */
-	gpio_request(gpio_cfg[board].pcie_rst, "pci_rst#");
-	gpio_direction_output(gpio_cfg[board].pcie_rst, 0);
-#endif
-
-	/* turn off (active-high) user LED's */
-	for (i = 0; i < ARRAY_SIZE(gpio_cfg[board].leds); i++) {
-		if (gpio_cfg[board].leds[i]) {
-			gpio_requestf(gpio_cfg[board].leds[i], "led_user%d", i);
-			gpio_direction_output(gpio_cfg[board].leds[i], 1);
-		}
-	}
-
-	/* Expansion Mezzanine IO */
-	if (gpio_cfg[board].mezz_pwren) {
-		gpio_request(gpio_cfg[board].mezz_pwren, "mezz_pwr");
-		gpio_direction_output(gpio_cfg[board].mezz_pwren, 0);
-	}
-	if (gpio_cfg[board].mezz_irq) {
-		gpio_request(gpio_cfg[board].mezz_irq, "mezz_irq#");
-		gpio_direction_input(gpio_cfg[board].mezz_irq);
-	}
-
-	/* RS485 Transmit Enable */
-	if (gpio_cfg[board].rs485en) {
-		gpio_request(gpio_cfg[board].rs485en, "rs485_en");
-		gpio_direction_output(gpio_cfg[board].rs485en, 0);
-	}
-
-	/* GPS_SHDN */
-	if (gpio_cfg[board].gps_shdn) {
-		gpio_request(gpio_cfg[board].gps_shdn, "gps_shdn");
-		gpio_direction_output(gpio_cfg[board].gps_shdn, 1);
-	}
-
-	/* Analog video codec power enable */
-	if (gpio_cfg[board].vidin_en) {
-		gpio_request(gpio_cfg[board].vidin_en, "anavidin_en");
-		gpio_direction_output(gpio_cfg[board].vidin_en, 1);
-	}
-
-	/* DIOI2C_DIS# */
-	if (gpio_cfg[board].dioi2c_en) {
-		gpio_request(gpio_cfg[board].dioi2c_en, "dioi2c_dis#");
-		gpio_direction_output(gpio_cfg[board].dioi2c_en, 0);
-	}
-
-	/* PCICK_SSON: disable spread-spectrum clock */
-	if (gpio_cfg[board].pcie_sson) {
-		gpio_request(gpio_cfg[board].pcie_sson, "pci_sson");
-		gpio_direction_output(gpio_cfg[board].pcie_sson, 0);
-	}
-
-	/* USBOTG Select (PCISKT or FrontPanel) */
-	if (gpio_cfg[board].usb_sel) {
-		gpio_request(gpio_cfg[board].usb_sel, "usb_pcisel");
-		gpio_direction_output(gpio_cfg[board].usb_sel,
-				      (hwconfig("usb_pcisel")) ? 1 : 0);
-	}
-
-
-	/* PCISKT_WDIS# (Wireless disable GPIO to miniPCIe sockets) */
-	if (gpio_cfg[board].wdis) {
-		gpio_request(gpio_cfg[board].wdis, "wlan_dis");
-		gpio_direction_output(gpio_cfg[board].wdis, 1);
-	}
-
-	/*
-	 * Configure DIO pinmux/padctl registers
-	 * see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions
-	 */
-	for (i = 0; i < 4; i++) {
-		struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i];
-		iomux_v3_cfg_t ctrl = DIO_PAD_CFG;
-		unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1;
-
-		if (!cfg->gpio_padmux[0] && !cfg->gpio_padmux[1])
-			continue;
-		sprintf(arg, "dio%d", i);
-		if (!hwconfig(arg))
-			continue;
-		s = hwconfig_subarg(arg, "padctrl", &len);
-		if (s) {
-			ctrl = MUX_PAD_CTRL(simple_strtoul(s, NULL, 16)
-					    & 0x1ffff) | MUX_MODE_SION;
-		}
-		if (hwconfig_subarg_cmp(arg, "mode", "gpio")) {
-			if (!quiet) {
-				printf("DIO%d:  GPIO%d_IO%02d (gpio-%d)\n", i,
-				       (cfg->gpio_param/32)+1,
-				       cfg->gpio_param%32,
-				       cfg->gpio_param);
-			}
-			imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] |
-					       ctrl);
-			gpio_requestf(cfg->gpio_param, "dio%d", i);
-			gpio_direction_input(cfg->gpio_param);
-		} else if (hwconfig_subarg_cmp("dio2", "mode", "pwm") &&
-			   cfg->pwm_padmux) {
-			if (!quiet)
-				printf("DIO%d:  pwm%d\n", i, cfg->pwm_param);
-			imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] |
-					       MUX_PAD_CTRL(ctrl));
-		}
-	}
-
-	if (!quiet) {
-		if (is_cpu_type(MXC_CPU_MX6Q) &&
-		    (test_bit(EECONFIG_SATA, info->config))) {
-			printf("MSATA: %s\n", (hwconfig("msata") ?
-			       "enabled" : "disabled"));
-		}
-		printf("RS232: %s\n", (hwconfig("rs232")) ?
-		       "enabled" : "disabled");
-	}
-}
-
 #if defined(CONFIG_CMD_PCI)
 int imx6_pcie_toggle_reset(void)
 {
@@ -1369,13 +543,10 @@ void get_board_serial(struct tag_serialnr *serialnr)
  * Board Support
  */
 
-/* called from SPL board_init_f() */
 int board_early_init_f(void)
 {
 	setup_iomux_uart();
 
-	gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */
-
 #if defined(CONFIG_VIDEO_IPUV3)
 	setup_display();
 #endif
@@ -1405,15 +576,7 @@ int board_init(void)
 #ifdef CONFIG_MXC_SPI
 	setup_spi();
 #endif
-	if (is_cpu_type(MXC_CPU_MX6Q)) {
-		setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info0);
-		setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1);
-		setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info2);
-	} else {
-		setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info0);
-		setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1);
-		setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info2);
-	}
+	setup_ventana_i2c();
 
 #ifdef CONFIG_CMD_SATA
 	setup_sata();
@@ -1421,22 +584,7 @@ int board_init(void)
 	/* read Gateworks EEPROM into global struct (used later) */
 	board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
 
-	/* board-specifc GPIO iomux */
-	SETUP_IOMUX_PADS(gw_gpio_pads);
-	if (board_type < GW_UNKNOWN) {
-		iomux_v3_cfg_t const *p = gpio_cfg[board_type].gpio_pads;
-		int count = gpio_cfg[board_type].num_pads;
-
-		imx_iomux_v3_setup_multiple_pads(p, count);
-
-		/* GW522x Uses GPIO3_IO23 for PCIE_RST# */
-		if (board_type == GW52xx && ventana_info.model[4] == '2')
-			gpio_cfg[board_type].pcie_rst = IMX_GPIO_NR(3, 23);
-
-		/* MSATA Enable - default to PCI */
-		gpio_request(GP_MSATA_SEL, "msata_en");
-		gpio_direction_output(GP_MSATA_SEL, 0);
-	}
+	setup_iomux_gpio(board_type, &ventana_info);
 
 	return 0;
 }
@@ -1585,8 +733,8 @@ int misc_init_r(void)
 	}
 
 
-	/* setup baseboard specific GPIO pinmux and config */
-	setup_board_gpio(board_type);
+	/* setup baseboard specific GPIO based on board and env */
+	setup_board_gpio(board_type, info);
 
 #ifdef CONFIG_CMD_BMODE
 	add_board_boot_modes(board_boot_modes);
-- 
1.9.1

[U-Boot] [PATCH 13/19] imx: ventana: move GSC boot watchdog disable function to gsc.c

[Tim Harvey]

Move the code that disables the GSC boot watchdog into gsc.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gsc.c        | 27 +++++++++++++++++++++++++++
 board/gateworks/gw_ventana/gsc.h        |  1 +
 board/gateworks/gw_ventana/gw_ventana.c | 24 ++----------------------
 3 files changed, 30 insertions(+), 22 deletions(-)

diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index 718e165..3febd12 100644
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -132,6 +132,33 @@ int gsc_info(int verbose)
 	return 0;
 }
 
+/*
+ *  The Gateworks System Controller implements a boot
+ *  watchdog (always enabled) as a workaround for IMX6 boot related
+ *  errata such as:
+ *    ERR005768 - no fix scheduled
+ *    ERR006282 - fixed in silicon r1.2
+ *    ERR007117 - fixed in silicon r1.3
+ *    ERR007220 - fixed in silicon r1.3
+ *    ERR007926 - no fix scheduled
+ *  see http://cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf
+ *
+ * Disable the boot watchdog
+ */
+int gsc_boot_wd_disable(void)
+{
+	u8 reg;
+
+	i2c_set_bus_num(CONFIG_I2C_GSC);
+	if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1)) {
+		reg |= (1 << GSC_SC_CTRL1_WDDIS);
+		if (!gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+			return 0;
+	}
+	puts("Error: could not disable GSC Watchdog\n");
+	return 1;
+}
+
 #ifdef CONFIG_CMD_GSC
 static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
diff --git a/board/gateworks/gw_ventana/gsc.h b/board/gateworks/gw_ventana/gsc.h
index 2d4969e..e0c0ed0 100644
--- a/board/gateworks/gw_ventana/gsc.h
+++ b/board/gateworks/gw_ventana/gsc.h
@@ -66,5 +66,6 @@ enum {
 int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
 int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
 int gsc_info(int verbose);
+int gsc_boot_wd_disable(void);
 #endif
 
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 8163d38..8c6f469 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -659,7 +659,6 @@ static const struct boot_mode board_boot_modes[] = {
 int misc_init_r(void)
 {
 	struct ventana_board_info *info = &ventana_info;
-	unsigned char reg;
 
 	/* set env vars based on EEPROM data */
 	if (ventana_info.model[0]) {
@@ -740,27 +739,8 @@ int misc_init_r(void)
 	add_board_boot_modes(board_boot_modes);
 #endif
 
-	/*
-	 *  The Gateworks System Controller implements a boot
-	 *  watchdog (always enabled) as a workaround for IMX6 boot related
-	 *  errata such as:
-	 *    ERR005768 - no fix scheduled
-	 *    ERR006282 - fixed in silicon r1.2
-	 *    ERR007117 - fixed in silicon r1.3
-	 *    ERR007220 - fixed in silicon r1.3
-	 *    ERR007926 - no fix scheduled
-	 *  see http://cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf
-	 *
-	 * Disable the boot watchdog and display/clear the timeout flag if set
-	 */
-	i2c_set_bus_num(CONFIG_I2C_GSC);
-	if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1)) {
-		reg |= (1 << GSC_SC_CTRL1_WDDIS);
-		if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
-			puts("Error: could not disable GSC Watchdog\n");
-	} else {
-		puts("Error: could not disable GSC Watchdog\n");
-	}
+	/* disable boot watchdog */
+	gsc_boot_wd_disable();
 
 	return 0;
 }
-- 
1.9.1

[U-Boot] [PATCH 14/19] imx: ventana: detect pmic using i2c probe instead of board model

[Tim Harvey]

Avoid requiring board-model and probe pmic by its i2c address.
This is in preparation for being able to call pmic_setup() from SPL
and not need board type.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c     | 10 +++++++---
 board/gateworks/gw_ventana/common.h     |  2 +-
 board/gateworks/gw_ventana/gw_ventana.c |  2 +-
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 45c5b4c..5fa5d6a 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -759,13 +759,16 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
 }
 
 /* setup board specific PMIC */
-void setup_pmic(int board)
+void setup_pmic(void)
 {
 	struct pmic *p;
 	u32 reg;
 
+	i2c_set_bus_num(CONFIG_I2C_PMIC);
+
 	/* configure PFUZE100 PMIC */
-	if (board == GW54xx || board == GW54proto) {
+	if (!i2c_probe(CONFIG_POWER_PFUZE100_I2C_ADDR)) {
+		debug("probed PFUZE100 at 0x%x\n", CONFIG_POWER_PFUZE100_I2C_ADDR);
 		power_pfuze100_init(CONFIG_I2C_PMIC);
 		p = pmic_get("PFUZE100");
 		if (p && !pmic_probe(p)) {
@@ -787,7 +790,8 @@ void setup_pmic(int board)
 	}
 
 	/* configure LTC3676 PMIC */
-	else {
+	else if (!i2c_probe(CONFIG_POWER_LTC3676_I2C_ADDR)) {
+		debug("probed LTC3676 at 0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR);
 		power_ltc3676_init(CONFIG_I2C_PMIC);
 		p = pmic_get("LTC3676_PMIC");
 		if (p && !pmic_probe(p)) {
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index a303b55..b7c0e96 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -89,7 +89,7 @@ void setup_ventana_i2c(void);
 /* configure uart iomux */
 void setup_iomux_uart(void);
 /* conifgure PMIC */
-void setup_pmic(int board);
+void setup_pmic(void);
 /* configure gpio iomux/defaults */
 void setup_iomux_gpio(int board, struct ventana_board_info *);
 /* late setup of GPIO (configuration per baseboard and env) */
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 8c6f469..22f3b38 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -468,7 +468,7 @@ static void setup_display(void)
 /* setup board specific PMIC */
 int power_init_board(void)
 {
-	setup_pmic(board_type);
+	setup_pmic();
 	return 0;
 }
 
-- 
1.9.1

[U-Boot] [PATCH 15/19] imx: ventana: use common uart and i2c setup functions in SPL

[Tim Harvey]

Now that uart and i2c setup functions have been moved to common.c we can
use these and remove code duplication.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana_spl.c | 52 +++--------------------------
 1 file changed, 5 insertions(+), 47 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 8fe0cae..82078a0 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -6,10 +6,8 @@
  */
 
 #include <common.h>
-#include <i2c.h>
 #include <asm/io.h>
 #include <asm/arch/crm_regs.h>
-#include <asm/arch/iomux.h>
 #include <asm/arch/mx6-ddr.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/sys_proto.h>
@@ -18,54 +16,14 @@
 #include <asm/imx-common/mxc_i2c.h>
 #include <spl.h>
 
-#include "ventana_eeprom.h"
+#include "gsc.h"
+#include "common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
 #define RTT_NOM_120OHM /* use 120ohm Rtt_nom vs 60ohm (lower power) */
-#define I2C_GSC			0
-#define GSC_EEPROM_ADDR		0x51
 #define GSC_EEPROM_DDR_SIZE	0x2B	/* enum (512,1024,2048) MB */
 #define GSC_EEPROM_DDR_WIDTH	0x2D	/* enum (32,64) bit */
-#define I2C_PAD_CTRL  (PAD_CTL_PUS_100K_UP |                    \
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |   \
-	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-#define CONFIG_SYS_I2C_SPEED	100000
-
-/* I2C1: GSC */
-static struct i2c_pads_info mx6q_i2c_pad_info0 = {
-	.scl = {
-		.i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
-		.gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
-		.gp = IMX_GPIO_NR(3, 21)
-	},
-	.sda = {
-		.i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
-		.gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
-		.gp = IMX_GPIO_NR(3, 28)
-	}
-};
-static struct i2c_pads_info mx6dl_i2c_pad_info0 = {
-	.scl = {
-		.i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
-		.gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
-		.gp = IMX_GPIO_NR(3, 21)
-	},
-	.sda = {
-		.i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
-		.gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
-		.gp = IMX_GPIO_NR(3, 28)
-	}
-};
-
-static void i2c_setup_iomux(void)
-{
-	if (is_cpu_type(MXC_CPU_MX6Q))
-		setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info0);
-	else
-		setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info0);
-}
 
 /* configure MX6Q/DUAL mmdc DDR io registers */
 struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {
@@ -540,8 +498,8 @@ void board_init_f(ulong dummy)
 	gpr_init();
 
 	/* iomux and setup of i2c */
-	board_early_init_f();
-	i2c_setup_iomux();
+	setup_iomux_uart();
+	setup_ventana_i2c();
 
 	/* setup GP timer */
 	timer_init();
@@ -550,7 +508,7 @@ void board_init_f(ulong dummy)
 	preloader_console_init();
 
 	/* read/validate EEPROM info to determine board model and SDRAM cfg */
-	board_model = read_eeprom(I2C_GSC, &ventana_info);
+	board_model = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
 
 	/* provide some some default: 32bit 128MB */
 	if (GW_UNKNOWN == board_model) {
-- 
1.9.1

[U-Boot] [PATCH 16/19] imx: ventana: add gpio setup to SPL

[Tim Harvey]

If the SPL is to be used for Falcon mode then we need to make sure it
configures basic GPIO (iomux, padconf, and default output levels).

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana_spl.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 82078a0..cde04cf 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -510,6 +510,9 @@ void board_init_f(ulong dummy)
 	/* read/validate EEPROM info to determine board model and SDRAM cfg */
 	board_model = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
 
+	/* configure model-specific gpio */
+	setup_iomux_gpio(board_model, &ventana_info);
+
 	/* provide some some default: 32bit 128MB */
 	if (GW_UNKNOWN == board_model) {
 		ventana_info.sdram_width = 2;
-- 
1.9.1

[U-Boot] [PATCH 17/19] imx: ventana: add pmic_setup to SPL

[Tim Harvey]

We need to do any PMIC setup in the SPL if we are to bypass U-Boot for
falcon mode.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana_spl.c | 3 +++
 include/configs/gw_ventana.h                | 1 +
 2 files changed, 4 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index cde04cf..1873d99 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -551,6 +551,9 @@ void spl_board_init(void)
 	default:
 		puts("Unknown boot device\n");
 	}
+
+	/* PMIC init */
+	setup_pmic();
 }
 
 void reset_cpu(ulong addr)
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index c61fbb9..ccf01e2 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -13,6 +13,7 @@
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
 /* Location on MMC to read U-Boot from */
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* 69KB */
 /* Location in NAND to read U-Boot from */
-- 
1.9.1

[U-Boot] [PATCH 18/19] imx: ventana: add GSC boot watchdog disable to SPL

[Tim Harvey]

If the SPL is to be used for Falcon mode then we need to make sure the SPL
disable the GSC boot watchdog.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana_spl.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 1873d99..0d8ccb6 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -527,6 +527,9 @@ void board_init_f(ulong dummy)
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
+	/* disable boot watchdog */
+	gsc_boot_wd_disable();
+
 	/* load/boot image from boot device */
 	board_init_r(NULL, 0);
 }
-- 
1.9.1

[U-Boot] [PATCH 19/19] imx: ventana: config: enable Falcon mode

[Tim Harvey]

Falcon mode entails the SPL booting the OS directly instead of U-Boot.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana_spl.c | 20 ++++++++++++++++++++
 include/configs/gw_ventana.h                | 16 ++++++++++++++++
 2 files changed, 36 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 0d8ccb6..73b5176 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -14,6 +14,7 @@
 #include <asm/imx-common/boot_mode.h>
 #include <asm/imx-common/iomux-v3.h>
 #include <asm/imx-common/mxc_i2c.h>
+#include <environment.h>
 #include <spl.h>
 
 #include "gsc.h"
@@ -559,6 +560,25 @@ void spl_board_init(void)
 	setup_pmic();
 }
 
+#ifdef CONFIG_SPL_OS_BOOT
+/* return 1 if we wish to boot to uboot vs os (falcon mode) */
+int spl_start_uboot(void)
+{
+	int ret = 1;
+
+	debug("%s\n", __func__);
+#ifdef CONFIG_SPL_ENV_SUPPORT
+	env_init();
+	env_relocate_spec();
+	debug("boot_os=%s\n", getenv("boot_os"));
+	if (getenv_yesno("boot_os") == 1)
+		ret = 0;
+#endif
+	debug("%s booting %s\n", __func__, ret ? "uboot" : "linux");
+	return ret;
+}
+#endif
+
 void reset_cpu(ulong addr)
 {
 }
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index ccf01e2..87cb32f 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -19,6 +19,22 @@
 /* Location in NAND to read U-Boot from */
 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)
 
+/* Falcon Mode */
+#define CONFIG_CMD_SPL
+#define CONFIG_SPL_OS_BOOT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
+#define CONFIG_CMD_SPL_WRITE_SIZE	(128 * SZ_1K)
+
+/* Falcon Mode - NAND support: args at 17MB kernel at 18MB */
+#define CONFIG_CMD_SPL_NAND_OFS		(17 * SZ_1M)
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	(18 * SZ_1M)
+
+/* Falcon Mode - MMC support: args at 1MB kernel at 2MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x800	/* 1MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	(CONFIG_CMD_SPL_WRITE_SIZE / 512)
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1000	/* 2MB */
+
 #include "imx6_spl.h"                  /* common IMX6 SPL configuration */
 #include "mx6_common.h"
 #define CONFIG_MX6
-- 
1.9.1

[U-Boot] [PATCH 19/19] imx: ventana: config: enable Falcon mode

[Fabio Estevam]

Hi Tim,

On Fri, May 8, 2015 at 10:28 PM, Tim Harvey <tharvey@gateworks.com> wrote:
> Falcon mode entails the SPL booting the OS directly instead of U-Boot.

I would like to give this a try, but I am not sure where the dtb
should be placed in the SD card.

Or are you combining the dtb and zImage into a single binary?

Do you have a small README that shows how the user should use Falcon mode?

Thanks!

[U-Boot] [PATCH 19/19] imx: ventana: config: enable Falcon mode

[Tim Harvey]

On Mon, May 18, 2015 at 4:25 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Tim,
>
> On Fri, May 8, 2015 at 10:28 PM, Tim Harvey <tharvey@gateworks.com> wrote:
>> Falcon mode entails the SPL booting the OS directly instead of U-Boot.
>
> I would like to give this a try, but I am not sure where the dtb
> should be placed in the SD card.
>
> Or are you combining the dtb and zImage into a single binary?
>
> Do you have a small README that shows how the user should use Falcon mode?
>
> Thanks!

Fabio,

I will be posting a README in the next day or so to document Falcon
mode usage on the Gateworks Ventana boards. In general the
documentation will be the same for any board using it but I'll provide
some detail about where things are stored in flash/mmc and what
#defines control that.

As a general rule though, when using Falcon mode for a device-tree
kernel the dtb must get loaded and processed via the 'spl export fdt'
command which you provide the kernel and dtb address in RAM you've
loaded them to because U-Boot will tweak the dtb then allow you to
store it back.

This is documented pretty well currently in doc/README.falcon. You
have to understand that the steps normally taken by U-Boot will be
skipped in Falcon mode as you go straight from SPL to OS. In the
general case this means your SPL must do anything that U-Boot
typically does for fixups including GPIO configuration (pinmux,
padctl, output/direction) for things the kernel may not be supporting
(hence my recent patches that move or replicate some of Ventana U-Boot
capability in the SPL). For the Linux OS case the SPL must do what the
bootm U-Boot command would have done which is to load the dtb, make
adjustments (enet macs, mtdparts, memsize, console args, anything in
ft_board_setup(), etc) and it does this by using the spl export
command which goes through all the steps that bootm does 'except' for
jumping to the kernel. Then you take the mem area that spl export left
the 'args' typically passed to the kernel and store that to your
non-volatile storage so that when the SPL boots in 'OS mode' it loads
the kernel, loads the pre-prepared args and jumps.

Note that Falcon mode also requires you have a function in the SPL
that decides to boot U-Boot or to skip it and boot the OS directly. In
the Gateworks Ventana case I didn't want to make this completely
dependent on a GPIO/Button because this bootloader supports about 8
different PCB designs in the Ventana family - some of which do not
have buttons or may not have buttons loaded on the board. Instead, I
pulled env support into the SPL and use 'boot_os' env var to decide as
other boards do (see spl_start_uboot()). I also have the Ventana
config build in support for both NAND and MMC so that in general the
same SPL/U-Boot can be used on Ventana boards with or without NAND.
U-Boot however currently does not support multiple environment backing
stores, so only NAND env is defined meaning Falcon mode for Ventana on
a nand-less board won't really work right as it will try to read env
from NAND. I have a downstream patch that adds multiple env support
which reads env from whatever the boot device was, however I have not
posted this patch yet and I don't expect it will be accepted because
it was desired for me to re-write env support instead which was a
large undertaking I don't have time for. Until then, mainline U-Boot
only supports Falcon mode on NAND for Ventana (which is the vast
majority of the Ventana boards).

Regards,

Tim

[U-Boot] [PATCH 19/19] imx: ventana: config: enable Falcon mode

[Fabio Estevam]

Hi Tim,

On Tue, May 19, 2015 at 10:26 AM, Tim Harvey <tharvey@gateworks.com> wrote:

> Fabio,
>
> I will be posting a README in the next day or so to document Falcon
> mode usage on the Gateworks Ventana boards. In general the
> documentation will be the same for any board using it but I'll provide
> some detail about where things are stored in flash/mmc and what
> #defines control that.
>
> As a general rule though, when using Falcon mode for a device-tree
> kernel the dtb must get loaded and processed via the 'spl export fdt'
> command which you provide the kernel and dtb address in RAM you've
> loaded them to because U-Boot will tweak the dtb then allow you to
> store it back.
>
> This is documented pretty well currently in doc/README.falcon. You
> have to understand that the steps normally taken by U-Boot will be
> skipped in Falcon mode as you go straight from SPL to OS. In the
> general case this means your SPL must do anything that U-Boot
> typically does for fixups including GPIO configuration (pinmux,
> padctl, output/direction) for things the kernel may not be supporting
> (hence my recent patches that move or replicate some of Ventana U-Boot
> capability in the SPL). For the Linux OS case the SPL must do what the
> bootm U-Boot command would have done which is to load the dtb, make
> adjustments (enet macs, mtdparts, memsize, console args, anything in
> ft_board_setup(), etc) and it does this by using the spl export
> command which goes through all the steps that bootm does 'except' for
> jumping to the kernel. Then you take the mem area that spl export left
> the 'args' typically passed to the kernel and store that to your
> non-volatile storage so that when the SPL boots in 'OS mode' it loads
> the kernel, loads the pre-prepared args and jumps.
>
> Note that Falcon mode also requires you have a function in the SPL
> that decides to boot U-Boot or to skip it and boot the OS directly. In
> the Gateworks Ventana case I didn't want to make this completely
> dependent on a GPIO/Button because this bootloader supports about 8
> different PCB designs in the Ventana family - some of which do not
> have buttons or may not have buttons loaded on the board. Instead, I
> pulled env support into the SPL and use 'boot_os' env var to decide as
> other boards do (see spl_start_uboot()). I also have the Ventana
> config build in support for both NAND and MMC so that in general the
> same SPL/U-Boot can be used on Ventana boards with or without NAND.
> U-Boot however currently does not support multiple environment backing
> stores, so only NAND env is defined meaning Falcon mode for Ventana on
> a nand-less board won't really work right as it will try to read env
> from NAND. I have a downstream patch that adds multiple env support
> which reads env from whatever the boot device was, however I have not
> posted this patch yet and I don't expect it will be accepted because
> it was desired for me to re-write env support instead which was a
> large undertaking I don't have time for. Until then, mainline U-Boot
> only supports Falcon mode on NAND for Ventana (which is the vast
> majority of the Ventana boards).

Thanks for your work on this and for your detailed reply! I will give
Falcon mode a try.

Thanks,

Fabio Estevam

[U-Boot] [PATCH 19/19] imx: ventana: config: enable Falcon mode

[Stefano Babic]

Hi Tim,

On 19/05/2015 15:26, Tim Harvey wrote:

> Note that Falcon mode also requires you have a function in the SPL
> that decides to boot U-Boot or to skip it and boot the OS directly. In
> the Gateworks Ventana case I didn't want to make this completely
> dependent on a GPIO/Button because this bootloader supports about 8
> different PCB designs in the Ventana family - some of which do not
> have buttons or may not have buttons loaded on the board. Instead, I
> pulled env support into the SPL and use 'boot_os' env var to decide as
> other boards do (see spl_start_uboot()).

Anyway, this can be dangerous. The reason having a GPIO (or any trigger
from external, for example a received char from the console) is to
switch to U-Boot if the kernel does not work (but the kernel image is
not corrupted), mainly go to panic, and the board can be restored into
U-Boot.

If you use an environment variable and the environment is put into the
NAND (with MMC you can change the card), there is nothing you can do
anymore. Board tries to boot until next panic, and then again and again.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 19/19] imx: ventana: config: enable Falcon mode

[Stefan Roese]

Hi Stefano,

On 21.05.2015 18:17, Stefano Babic wrote:
> On 19/05/2015 15:26, Tim Harvey wrote:
>
>> Note that Falcon mode also requires you have a function in the SPL
>> that decides to boot U-Boot or to skip it and boot the OS directly. In
>> the Gateworks Ventana case I didn't want to make this completely
>> dependent on a GPIO/Button because this bootloader supports about 8
>> different PCB designs in the Ventana family - some of which do not
>> have buttons or may not have buttons loaded on the board. Instead, I
>> pulled env support into the SPL and use 'boot_os' env var to decide as
>> other boards do (see spl_start_uboot()).
>
> Anyway, this can be dangerous. The reason having a GPIO (or any trigger
> from external, for example a received char from the console) is to
> switch to U-Boot if the kernel does not work (but the kernel image is
> not corrupted), mainly go to panic, and the board can be restored into
> U-Boot.
>
> If you use an environment variable and the environment is put into the
> NAND (with MMC you can change the card), there is nothing you can do
> anymore. Board tries to boot until next panic, and then again and again.

Some boards just don't have such a means as a push button or jumper to 
select the Falcon mode. That's why I introduced this environment 
variable dependent way to select Falcon mode quite some time ago for a 
PPC based board.

You are correct. If something goes completely wrong, and the board tries 
to boot into the OS with a non-working OS installed, then you are 
doomed. JTAG comes in handy then as I have experienced myself. ;)

But this is usually only while developing this feature and kernel. Once 
its tested and mature, this really works.

Again, its a trade-off since another, better method to switch between 
U-Boot- and OS- booting is not available.

Thanks,
Stefan

[U-Boot] [PATCH 19/19] imx: ventana: config: enable Falcon mode

[Stefano Babic]

Hi Stefan,

On 21/05/2015 18:46, Stefan Roese wrote:

>> If you use an environment variable and the environment is put into the
>> NAND (with MMC you can change the card), there is nothing you can do
>> anymore. Board tries to boot until next panic, and then again and again.
> 
> Some boards just don't have such a means as a push button or jumper to
> select the Falcon mode. That's why I introduced this environment
> variable dependent way to select Falcon mode quite some time ago for a
> PPC based board.
> 
> You are correct. If something goes completely wrong, and the board tries
> to boot into the OS with a non-working OS installed, then you are
> doomed. JTAG comes in handy then as I have experienced myself. ;)

Right

> 
> But this is usually only while developing this feature and kernel. Once
> its tested and mature, this really works.

Yes, when the product is delivered to the customer, this does not
matter. But we should be aware of it, and know that something can go wrong.

> 
> Again, its a trade-off since another, better method to switch between
> U-Boot- and OS- booting is not available.

Exactly - anyway, patch is applied and I run build again on imx board.
Repository will be updated soon.

Best regards,
Stefano



-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 19/19] imx: ventana: config: enable Falcon mode

[Tim Harvey]

On Thu, May 21, 2015 at 9:46 AM, Stefan Roese <sr@denx.de> wrote:
> Hi Stefano,
>
> On 21.05.2015 18:17, Stefano Babic wrote:
>>
>> On 19/05/2015 15:26, Tim Harvey wrote:
>>
>>> Note that Falcon mode also requires you have a function in the SPL
>>> that decides to boot U-Boot or to skip it and boot the OS directly. In
>>> the Gateworks Ventana case I didn't want to make this completely
>>> dependent on a GPIO/Button because this bootloader supports about 8
>>> different PCB designs in the Ventana family - some of which do not
>>> have buttons or may not have buttons loaded on the board. Instead, I
>>> pulled env support into the SPL and use 'boot_os' env var to decide as
>>> other boards do (see spl_start_uboot()).
>>
>>
>> Anyway, this can be dangerous. The reason having a GPIO (or any trigger
>> from external, for example a received char from the console) is to
>> switch to U-Boot if the kernel does not work (but the kernel image is
>> not corrupted), mainly go to panic, and the board can be restored into
>> U-Boot.
>>
>> If you use an environment variable and the environment is put into the
>> NAND (with MMC you can change the card), there is nothing you can do
>> anymore. Board tries to boot until next panic, and then again and again.
>
>
> Some boards just don't have such a means as a push button or jumper to
> select the Falcon mode. That's why I introduced this environment variable
> dependent way to select Falcon mode quite some time ago for a PPC based
> board.
>
> You are correct. If something goes completely wrong, and the board tries to
> boot into the OS with a non-working OS installed, then you are doomed. JTAG
> comes in handy then as I have experienced myself. ;)
>
> But this is usually only while developing this feature and kernel. Once its
> tested and mature, this really works.
>
> Again, its a trade-off since another, better method to switch between
> U-Boot- and OS- booting is not available.
>
> Thanks,
> Stefan
>

Agreed - this is exactly why I decided (at cost) to use an env
variable - not all of our boards have a gpio that makes sense and I am
am focusing on flexibility.

Tim

[U-Boot] [PATCH 00/19] imx: ventana: misc updates

[Stefano Babic]

Hi Tim,

On 09/05/2015 03:28, Tim Harvey wrote:
> This collection of patches comprises a set of various updates I've been
> on for Ventana.
> 
> In summary:
>  - enable driver model
>  - enable gpio command
>  - enable dm-serial
>  - enable thermal support
>  - fixup for GW522x PCI enumeration
>  - split out common code shared between SPL an U-Boot
>  - pull down various init code to the SPL for use in Falcon mode
>  - enable Falcon mode (based on env var)
> 
> The enabling of Falcon mode is dependent on a patch I submitted earlier
> allowing nand env in spl [1].
> 
> Currently Falcon mode is configured for NAND boot. I plan on re-working
> a pending patchset I have that allows dynamic env support (use mmc or nand
> env depending on boot device) but I still need to re-work that using
> driver-model so it will come later.
> 
> I will send a followup patch with README updates explaining our use of Falcon
> mode if everything here looks good.
> 
> Tim
> 
> [1] https://patchwork.ozlabs.org/patch/470191/
> 
> Tim Harvey (19):
>   imx: ventana: set dtype env var to boot media
>   imx: ventana: display SPL boot device
>   imx: ventana: config: enable gpio command
>   imx: ventana: config: enable driver model
>   imx: ventana: register gpio's with gpio_request
>   imx: ventana: enable DM_SERIAL
>   imx: ventana: config: enable Thermal support
>   imx: ventana: config: use MMC SPL RAW support
>   imx: ventana: (cosmetic) clean up size defines for improved
>     readability
>   imx: ventana: fix pcie reset for GW522x
>   imx: ventana: default msata/pci mux to pci before PCI enumeration
>   imx: ventana: split out common functions between SPL and uboot
>   imx: ventana: move GSC boot watchdog disable function to gsc.c
>   imx: ventana: detect pmic using i2c probe instead of board model
>   imx: ventana: use common uart and i2c setup functions in SPL
>   imx: ventana: add gpio setup to SPL
>   imx: ventana: add pmic_setup to SPL
>   imx: ventana: add GSC boot watchdog disable to SPL
>   imx: ventana: config: enable Falcon mode
> 
>  board/gateworks/gw_ventana/Makefile         |   2 +-
>  board/gateworks/gw_ventana/common.c         | 827 +++++++++++++++++++++++++
>  board/gateworks/gw_ventana/common.h         |  98 +++
>  board/gateworks/gw_ventana/gsc.c            |  27 +
>  board/gateworks/gw_ventana/gsc.h            |   1 +
>  board/gateworks/gw_ventana/gw_ventana.c     | 911 ++--------------------------
>  board/gateworks/gw_ventana/gw_ventana_spl.c | 103 ++--
>  include/configs/gw_ventana.h                |  67 +-
>  8 files changed, 1102 insertions(+), 934 deletions(-)
>  create mode 100644 board/gateworks/gw_ventana/common.c
>  create mode 100644 board/gateworks/gw_ventana/common.h
> 

Patches 1-7, 10-16, 18 applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 00/19] imx: ventana: misc updates

[Tim Harvey]

On Fri, May 15, 2015 at 7:25 AM, Stefano Babic <sbabic@denx.de> wrote:
> Hi Tim,
>
> On 09/05/2015 03:28, Tim Harvey wrote:
>> This collection of patches comprises a set of various updates I've been
>> on for Ventana.
>>
>> In summary:
>>  - enable driver model
>>  - enable gpio command
>>  - enable dm-serial
>>  - enable thermal support
>>  - fixup for GW522x PCI enumeration
>>  - split out common code shared between SPL an U-Boot
>>  - pull down various init code to the SPL for use in Falcon mode
>>  - enable Falcon mode (based on env var)
>>
>> The enabling of Falcon mode is dependent on a patch I submitted earlier
>> allowing nand env in spl [1].
>>
>> Currently Falcon mode is configured for NAND boot. I plan on re-working
>> a pending patchset I have that allows dynamic env support (use mmc or nand
>> env depending on boot device) but I still need to re-work that using
>> driver-model so it will come later.
>>
>> I will send a followup patch with README updates explaining our use of Falcon
>> mode if everything here looks good.
>>
>> Tim
>>
>> [1] https://patchwork.ozlabs.org/patch/470191/
>>
>> Tim Harvey (19):
>>   imx: ventana: set dtype env var to boot media
>>   imx: ventana: display SPL boot device
>>   imx: ventana: config: enable gpio command
>>   imx: ventana: config: enable driver model
>>   imx: ventana: register gpio's with gpio_request
>>   imx: ventana: enable DM_SERIAL
>>   imx: ventana: config: enable Thermal support
>>   imx: ventana: config: use MMC SPL RAW support
>>   imx: ventana: (cosmetic) clean up size defines for improved
>>     readability
>>   imx: ventana: fix pcie reset for GW522x
>>   imx: ventana: default msata/pci mux to pci before PCI enumeration
>>   imx: ventana: split out common functions between SPL and uboot
>>   imx: ventana: move GSC boot watchdog disable function to gsc.c
>>   imx: ventana: detect pmic using i2c probe instead of board model
>>   imx: ventana: use common uart and i2c setup functions in SPL
>>   imx: ventana: add gpio setup to SPL
>>   imx: ventana: add pmic_setup to SPL
>>   imx: ventana: add GSC boot watchdog disable to SPL
>>   imx: ventana: config: enable Falcon mode
>>
>>  board/gateworks/gw_ventana/Makefile         |   2 +-
>>  board/gateworks/gw_ventana/common.c         | 827 +++++++++++++++++++++++++
>>  board/gateworks/gw_ventana/common.h         |  98 +++
>>  board/gateworks/gw_ventana/gsc.c            |  27 +
>>  board/gateworks/gw_ventana/gsc.h            |   1 +
>>  board/gateworks/gw_ventana/gw_ventana.c     | 911 ++--------------------------
>>  board/gateworks/gw_ventana/gw_ventana_spl.c | 103 ++--
>>  include/configs/gw_ventana.h                |  67 +-
>>  8 files changed, 1102 insertions(+), 934 deletions(-)
>>  create mode 100644 board/gateworks/gw_ventana/common.c
>>  create mode 100644 board/gateworks/gw_ventana/common.h
>>
>
> Patches 1-7, 10-16, 18 applied to u-boot-imx, thanks !
>
> Best regards,
> Stefano Babic
>

Stefano,

Thanks - I just posted a v2 of patch 8 and a rebased 9 and 17
(assuming that is why you skipped those two).

You were right to hold off on 19 as it will fail to compile until
'env_nand: use nand_spl_load_image for readenv if SPL' [1] is accepted
which I sent to Scott as he's the nand maintainer - he's given a
thumbs up but may be waiting for additional feedback (or perhaps
waiting on my attempted simplification of readenv which I've about
lost interest on as its just a simplification and apparently I don't
understand the args to nand_read_skip_bad).

Tim

[1] - https://patchwork.ozlabs.org/patch/472491/

[U-Boot] [PATCH 00/19] imx: ventana: misc updates

[Stefano Babic]

Hi Tim,

On 15/05/2015 18:30, Tim Harvey wrote:

>>>
>>
>> Patches 1-7, 10-16, 18 applied to u-boot-imx, thanks !
>>
>> Best regards,
>> Stefano Babic
>>
> 
> Stefano,
> 
> Thanks - I just posted a v2 of patch 8 and a rebased 9 and 17
> (assuming that is why you skipped those two).
> 
> You were right to hold off on 19 as it will fail to compile until
> 'env_nand: use nand_spl_load_image for readenv if SPL' [1] is accepted

Exactly : it depends on that patch. But patch is ok, and it is the first
example for an i.MX6 using Falcon Boot. On my site, it is ready to be
applied.

> which I sent to Scott as he's the nand maintainer - he's given a
> thumbs up but may be waiting for additional feedback (or perhaps
> waiting on my attempted simplification of readenv which I've about
> lost interest on as its just a simplification and apparently I don't
> understand the args to nand_read_skip_bad).

> [1] - https://patchwork.ozlabs.org/patch/472491/

Maybe we are confused. [1] is in the common area more as related to MTD,
that is Tom's (I put him in CC:).

Best regards,
Stefano

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 00/19] imx: ventana: misc updates

[Otavio Salvador]

On Fri, May 15, 2015 at 1:56 PM, Stefano Babic <sbabic@denx.de> wrote:
> On 15/05/2015 18:30, Tim Harvey wrote:
>>> Patches 1-7, 10-16, 18 applied to u-boot-imx, thanks !
>> You were right to hold off on 19 as it will fail to compile until
>> 'env_nand: use nand_spl_load_image for readenv if SPL' [1] is accepted
>
> Exactly : it depends on that patch. But patch is ok, and it is the first
> example for an i.MX6 using Falcon Boot. On my site, it is ready to be
> applied.

I would prefer if both went through i.MX tree.

-- 
Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

[U-Boot] [PATCH 00/19] imx: ventana: misc updates

[Tom Rini]

On Fri, May 15, 2015 at 03:57:52PM -0300, Otavio Salvador wrote:
> On Fri, May 15, 2015 at 1:56 PM, Stefano Babic <sbabic@denx.de> wrote:
> > On 15/05/2015 18:30, Tim Harvey wrote:
> >>> Patches 1-7, 10-16, 18 applied to u-boot-imx, thanks !
> >> You were right to hold off on 19 as it will fail to compile until
> >> 'env_nand: use nand_spl_load_image for readenv if SPL' [1] is accepted
> >
> > Exactly : it depends on that patch. But patch is ok, and it is the first
> > example for an i.MX6 using Falcon Boot. On my site, it is ready to be
> > applied.
> 
> I would prefer if both went through i.MX tree.

Scott ack'd it, I'm fine with it coming via u-boot-imx.

-- 
Tom
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[U-Boot] [PATCH 00/19] imx: ventana: misc updates

[Stefano Babic]

On 21/05/2015 18:56, Tom Rini wrote:
> On Fri, May 15, 2015 at 03:57:52PM -0300, Otavio Salvador wrote:
>> On Fri, May 15, 2015 at 1:56 PM, Stefano Babic <sbabic@denx.de> wrote:
>>> On 15/05/2015 18:30, Tim Harvey wrote:
>>>>> Patches 1-7, 10-16, 18 applied to u-boot-imx, thanks !
>>>> You were right to hold off on 19 as it will fail to compile until
>>>> 'env_nand: use nand_spl_load_image for readenv if SPL' [1] is accepted
>>>
>>> Exactly : it depends on that patch. But patch is ok, and it is the first
>>> example for an i.MX6 using Falcon Boot. On my site, it is ready to be
>>> applied.
>>
>> I would prefer if both went through i.MX tree.
> 
> Scott ack'd it, I'm fine with it coming via u-boot-imx.

Thanks. I will apply the Falcon's patch, too.

Best regards,
Stefano


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v2 08/19] imx: ventana: config: use MMC SPL RAW support

[Tim Harvey]

Switch to MMC RAW support for SPL. We will place the uboot.img at 69KB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2: remove unnecessary CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR define

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index b20b338..dd7188b 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -11,10 +11,6 @@
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-/*
-#define CONFIG_SPL_SATA_SUPPORT
-*/
 /* Location in NAND to read U-Boot from */
 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * 1024 * 1024)
 
-- 
1.9.1

[U-Boot] [PATCH v2 08/19] imx: ventana: config: use MMC SPL RAW support

[Stefano Babic]

On 15/05/2015 18:14, Tim Harvey wrote:
> Switch to MMC RAW support for SPL. We will place the uboot.img at 69KB.
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> v2: remove unnecessary CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR define
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  include/configs/gw_ventana.h | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
> index b20b338..dd7188b 100644
> --- a/include/configs/gw_ventana.h
> +++ b/include/configs/gw_ventana.h
> @@ -11,10 +11,6 @@
>  #define CONFIG_SPL_BOARD_INIT
>  #define CONFIG_SPL_NAND_SUPPORT
>  #define CONFIG_SPL_MMC_SUPPORT
> -#define CONFIG_SPL_FAT_SUPPORT
> -/*
> -#define CONFIG_SPL_SATA_SUPPORT
> -*/
>  /* Location in NAND to read U-Boot from */
>  #define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * 1024 * 1024)
>  

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v2 09/19] imx: ventana: (cosmetic) clean up size defines for improved readability

[Tim Harvey]

Use the SZ_1M and SZ_1K macros from linuz/sizes.h for improved readability

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2: no changes - rebased
---
 include/configs/gw_ventana.h | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index dd7188b..663e9c5 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -7,12 +7,14 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/sizes.h>
+
 /* SPL */
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
 /* Location in NAND to read U-Boot from */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * 1024 * 1024)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)
 
 #include "imx6_spl.h"                  /* common IMX6 SPL configuration */
 #include "mx6_common.h"
@@ -35,7 +37,7 @@
 #define CONFIG_SYS_GENERIC_BOARD
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
 
 /* Init Functions */
 #define CONFIG_BOARD_EARLY_INIT_F
@@ -308,19 +310,19 @@
 #define CONFIG_ENV_IS_IN_NAND
 #endif
 #if defined(CONFIG_ENV_IS_IN_MMC)
-  #define CONFIG_ENV_OFFSET              (6 * 64 * 1024)
-  #define CONFIG_ENV_SIZE                (8 * 1024)
+  #define CONFIG_ENV_OFFSET              (384 * SZ_1K)
+  #define CONFIG_ENV_SIZE                (8 * SZ_1K)
   #define CONFIG_SYS_MMC_ENV_DEV         0
 #elif defined(CONFIG_ENV_IS_IN_NAND)
-  #define CONFIG_ENV_OFFSET              (16 << 20)
-  #define CONFIG_ENV_SECT_SIZE           (128 << 10)
+  #define CONFIG_ENV_OFFSET              (16 * SZ_1M)
+  #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
   #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
-  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 << 10))
+  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 * SZ_1K))
   #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
-  #define CONFIG_ENV_OFFSET              (512 * 1024)
-  #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
-  #define CONFIG_ENV_SIZE                (8 * 1024)
+  #define CONFIG_ENV_OFFSET		(512 * SZ_1K)
+  #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
+  #define CONFIG_ENV_SIZE		(8 * SZ_1K)
   #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
   #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
   #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-- 
1.9.1

[U-Boot] [PATCH v2 09/19] imx: ventana: (cosmetic) clean up size defines for improved readability

[Stefano Babic]

On 15/05/2015 18:17, Tim Harvey wrote:
> Use the SZ_1M and SZ_1K macros from linuz/sizes.h for improved readability
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v2 17/19] imx: ventana: add pmic_setup to SPL

[Tim Harvey]

We need to do any PMIC setup in the SPL if we are to bypass U-Boot for
falcon mode.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2: rebased
---
 board/gateworks/gw_ventana/gw_ventana_spl.c | 3 +++
 include/configs/gw_ventana.h                | 1 +
 2 files changed, 4 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 79cb594..2bec428 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -551,6 +551,9 @@ void spl_board_init(void)
 	default:
 		puts("Unknown boot device\n");
 	}
+
+	/* PMIC init */
+	setup_pmic();
 }
 
 void reset_cpu(ulong addr)
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 663e9c5..533cbc3 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -13,6 +13,7 @@
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
 /* Location in NAND to read U-Boot from */
 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)
 
-- 
1.9.1

[U-Boot] [PATCH v2 17/19] imx: ventana: add pmic_setup to SPL

[Stefano Babic]

On 15/05/2015 18:18, Tim Harvey wrote:
> We need to do any PMIC setup in the SPL if we are to bypass U-Boot for
> falcon mode.
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> v2: rebased
> ---


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================