From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nikolay Dimitrov Date: Mon, 18 May 2015 01:32:25 +0300 Subject: [U-Boot] [PATCH v2 1/4] mx6: add OTP bank1 registers In-Reply-To: <1431580312-24880-2-git-send-email-tharvey@gateworks.com> References: <1431580312-24880-1-git-send-email-tharvey@gateworks.com> <1431580312-24880-2-git-send-email-tharvey@gateworks.com> Message-ID: <555916F9.2010306@mail.bg> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Tim, On 05/14/2015 08:11 AM, Tim Harvey wrote: > Signed-off-by: Tim Harvey > --- > arch/arm/include/asm/arch-mx6/imx-regs.h | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h > index 9a4ad8b..35bb005 100644 > --- a/arch/arm/include/asm/arch-mx6/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h > @@ -640,6 +640,25 @@ struct fuse_bank0_regs { > u32 rsvd7[3]; > }; > > +struct fuse_bank1_regs { > + u32 mem0; > + u32 rsvd0[3]; > + u32 mem1; > + u32 rsvd1[3]; > + u32 mem2; > + u32 rsvd2[3]; > + u32 mem3; > + u32 rsvd3[3]; > + u32 mem4; > + u32 rsvd4[3]; > + u32 ana0; > + u32 rsvd5[3]; > + u32 ana1; > + u32 rsvd6[3]; > + u32 ana2; > + u32 rsvd7[3]; > +}; > + > #ifdef CONFIG_MX6SX > struct fuse_bank4_regs { > u32 sjc_resp_low; > U-Boot 2015.07-rc1-21804-gaf1db4a-dirty (May 18 2015 - 01:26:05) CPU: Freescale i.MX6SOLO rev1.1 996 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 59C Reset cause: POR Board: RIoTboard Tested-by: Nikolay Dimitrov Regards, Nikolay