From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/8] imx: mx6: Add MX6DQP CPU rev type
Date: Wed, 10 Jun 2015 12:09:15 +0200 [thread overview]
Message-ID: <55780CCB.9080504@denx.de> (raw)
In-Reply-To: <20150610100146.GB26860@shlinux2>
Hi Peng,
On 10/06/2015 12:01, Peng Fan wrote:
>>> +#define is_mx6dqp() ((is_cpu_type(MXC_CPU_MX6Q) || \
>>> + is_cpu_type(MXC_CPU_MX6D)) && \
>>> + (is_soc_rev(CHIP_REV_2_0) >= 0))
>>> +
>>
>> As "insider" you could better explain me: it looks like there will be
>> not a Quad/Dual with an increased chip revision. The new chip revision
>> for i.MX6 is really the QP (P=perfect, as I see some workaround can be
>> removed !)
>>
>> Is it correct ? Else this conflicts if a 6Q with a revision > 2 will be
>> released.
> P mean plus.
I know, it was only a joke ;-). There is not "perfect" SOC.
> It is from 6Q, since ic did not give new chip id for id, we use
> revision.
This is ok now until a 6Q with revision 2 or greater will be released.
Then there is a conflict and u-boot cannot identify a 6QP from a 6Q.
But it is still ok if Freescale will *never* plan to release a newer 6Q.
Is it ?
Best regards,
Stefano Babic
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next prev parent reply other threads:[~2015-06-10 10:09 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-10 8:06 [U-Boot] [PATCH 1/8] imx: mx6 cast return type of is_soc_rev to int Peng Fan
2015-06-10 8:06 ` [U-Boot] [PATCH 2/8] imx: mx6: Add MX6DQP CPU rev type Peng Fan
2015-06-10 9:19 ` Stefano Babic
2015-06-10 10:01 ` Peng Fan
2015-06-10 10:09 ` Stefano Babic [this message]
2015-06-10 8:06 ` [U-Boot] [PATCH 3/8] imx: mx6: L2cache: Enable the double line fill for i.MX6DQP Peng Fan
2015-06-10 8:06 ` [U-Boot] [PATCH 4/8] imx: mx6: ccm: Change the clock settings for i.MX6QP Peng Fan
2015-06-10 9:23 ` Stefano Babic
2015-06-10 10:03 ` Peng Fan
2015-06-10 8:06 ` [U-Boot] [PATCH 5/8] imx: mx6: hab : Remove the cache issue workaroud in hab " Peng Fan
2015-06-10 8:06 ` [U-Boot] [PATCH 6/8] imx: mx6qp: Enable PRG clock for IPU Peng Fan
2015-06-10 9:24 ` Stefano Babic
2015-06-10 10:04 ` Peng Fan
2015-06-10 8:06 ` [U-Boot] [PATCH 7/8] imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board support Peng Fan
2015-06-10 9:40 ` Stefano Babic
2015-06-10 10:17 ` Peng Fan
2015-06-10 8:06 ` [U-Boot] [PATCH 8/8] imx: mx6qp: Adjust AQos settings for peripherals Peng Fan
2015-06-10 9:44 ` Stefano Babic
2015-06-10 10:18 ` Peng Fan
2015-06-10 8:20 ` [U-Boot] [PATCH 1/8] imx: mx6 cast return type of is_soc_rev to int Stefano Babic
2015-06-10 8:42 ` Peng Fan
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