From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stefano Babic <sbabic@denx.de>
Date: Wed, 10 Jun 2015 12:09:15 +0200
Subject: [U-Boot] [PATCH 2/8] imx: mx6: Add MX6DQP CPU rev type
In-Reply-To: <20150610100146.GB26860@shlinux2>
References: <1433923603-28119-1-git-send-email-Peng.Fan@freescale.com>
 <1433923603-28119-2-git-send-email-Peng.Fan@freescale.com>
 <5578010B.7030603@denx.de> <20150610100146.GB26860@shlinux2>
Message-ID: <55780CCB.9080504@denx.de>
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To: u-boot@lists.denx.de

Hi Peng,

On 10/06/2015 12:01, Peng Fan wrote:

>>> +#define is_mx6dqp() ((is_cpu_type(MXC_CPU_MX6Q) || \
>>> +		     is_cpu_type(MXC_CPU_MX6D)) && \
>>> +		     (is_soc_rev(CHIP_REV_2_0) >= 0))
>>> +
>>
>> As "insider" you could better explain me: it looks like there will be
>> not a Quad/Dual with an increased chip revision. The new chip revision
>> for i.MX6 is really the QP  (P=perfect, as I see some workaround can be
>> removed !)
>>
>> Is it correct ? Else this conflicts if a 6Q with a revision > 2 will be
>> released.
> P mean plus.

I know, it was only a joke ;-). There is not "perfect" SOC.

> It is from 6Q, since ic did not give new chip id for id, we use
> revision.

This is ok now until a 6Q with revision 2 or greater will be released.
Then there is a conflict and  u-boot cannot identify a 6QP from a 6Q.
But it is still ok if Freescale will *never* plan to release a newer 6Q.
Is it ?

Best regards,
Stefano Babic

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