From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Fri, 12 Jun 2015 14:10:21 +0200 Subject: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width In-Reply-To: <9026814FBF99304F9FA3AC3FB72F3E2F016A84F8@SAFEX1MAIL4.st.com> References: <1433899499-17753-1-git-send-email-vikas.manocha@st.com> <9026814FBF99304F9FA3AC3FB72F3E2F016A84F8@SAFEX1MAIL4.st.com> Message-ID: <557ACC2D.5000503@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Vikas, On 11.06.2015 21:16, Vikas MANOCHA wrote: > Any comments on the patchset. I'll test them next week on a SoCFPGA based board and will comment then again. Thanks, Stefan