From mboxrd@z Thu Jan  1 00:00:00 1970
From: Heiko Schocher denx <hs@denx.de>
Date: Tue, 16 Jun 2015 14:51:18 +0200
Subject: [U-Boot] [PATCH] arm,
	am33xx: update for siemens am335x based boards
In-Reply-To: <27E9275BC1C8554E840881B19B62BE421996AF@DENBGAT9EI1MSX.ww902.siemens.net>
References: <1434372897-9250-1-git-send-email-hs@denx.de>
 <27E9275BC1C8554E840881B19B62BE421996AF@DENBGAT9EI1MSX.ww902.siemens.net>
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To: u-boot@lists.denx.de

Hello Samuel,

Am 16.06.2015 um 14:08 schrieb Egli, Samuel:
> Hi Heiko,
>
> I noticed a little discrepancy concerning delay for DDR3. During
> last rebase to v2015.04 I observed that delay needs to be
> increased to boot successfully. Somehow some timing behavior
> changed since v2014.04.
>
> I set it to udelay(2000) and it works fine again. Please
> update your patch.

Ups... Ok, I send an updated v2 patch.
Thanks!

bye,
Heiko
>
> Sam
>
>
>> -----Original Message-----
>> From: Heiko Schocher [mailto:hs at denx.de]
>> Sent: Montag, 15. Juni 2015 14:55
>> To: u-boot at lists.denx.de
>> Cc: Heiko Schocher; Egli, Samuel; Tom Rini
>> Subject: [PATCH] arm, am33xx: update for siemens am335x based boards
>> [...]
>> @@ -193,6 +196,11 @@ struct ctrl_ioregs draco_ddr3_ioregs = {
>>
>> 	config_ddr(DDR_PLL_FREQ, &draco_ddr3_ioregs, &draco_ddr3_data,
>> 		   &draco_ddr3_cmd_ctrl_data, &draco_ddr3_emif_reg_data, 0);
>> +
>> +	/* For Samsung 2Gbit RAM we need this delay otherwise config fails
>> after
>> +	 * soft reset.
>> +	 */
>> +	udelay(1000);
>> }
>> [...]
>

-- 
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