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From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes
Date: Thu, 18 Jun 2015 14:02:10 +0200	[thread overview]
Message-ID: <5582B342.20209@denx.de> (raw)
In-Reply-To: <1434507265-16573-1-git-send-email-vikas.manocha@st.com>

Hi Vikas,

I finally got to testing your latest patchset. And have
some comments / problems:

On 17.06.2015 04:14, Vikas Manocha wrote:
> This patchset:
> - removes sram polling while reading/writing from flash.
> - fixes trigger base & transfer start address register programming. This fix
> superseeds the previous patch "spi: cadence_qspi: Fix the indirect ahb trigger
> address setting"
> - adds support to get fifo width from device tree
> 
> Vikas Manocha (7):
>    spi: cadence_qspi: remove sram polling from flash read
>    spi: cadence_qspi: read can be independent of fifo width
>    spi: cadence_qspi: remove sram polling from flash write
>    spi: cadence_qspi: move trigger base configuration in init
>    spi: cadence_qspi: fix indirect read/write start address
>    spi: cadence_qspi: fix base trigger address & transfer start address
>    spi: cadence_qspi: get fifo width from device tree
> 
>   arch/arm/dts/socfpga.dtsi      |    2 +
>   arch/arm/dts/stv0991.dts       |    4 +-
>   drivers/spi/cadence_qspi.c     |   14 ++--
>   drivers/spi/cadence_qspi.h     |    6 +-
>   drivers/spi/cadence_qspi_apb.c |  140 ++++++++++------------------------------
>   5 files changed, 50 insertions(+), 116 deletions(-)

With these patches applied, I see this compilation error:

$ make -s -j10
Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error
FATAL ERROR: Unable to parse input tree
Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error
FATAL ERROR: Unable to parse input tree
make[2]: *** [arch/arm/dts/socfpga_arria5_socdk.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
make[2]: *** [arch/arm/dts/socfpga_cyclone5_socdk.dtb] Error 1
Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error
FATAL ERROR: Unable to parse input tree
make[2]: *** [arch/arm/dts/socfpga_cyclone5_socrates.dtb] Error 1

The socfpga.dtsi has incorrect syntax. Here a quick fix for this -
please add this to your next version. And please also compile-test
for e.g. socrates.

$ gd
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index a2a2029..448870e 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -633,8 +633,8 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0xff705000 0x1000>,
-                               <0xffa00000 0x1000>;
-                               <0x00000000 0x0010>;
+                             <0xffa00000 0x1000>,
+                             <0x00000000 0x0010>;
                        interrupts = <0 151 4>;
                        clocks = <&qspi_clk>;
                        ext-decoder = <0>;  /* external decoder */


Okay. After installing the resulting image on the SoCrates, I get
the following error while reading from SD-card:

=> sf probe
SF: Detected N25Q256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #define CONFIG_SPI_FLASH_BAR
=> sf read 100000 0 100000
QSPI: indirect completion status error with reg 0x0000000c
SF: 1048576 bytes @ 0x0 Read: ERROR

So there seems to be something breaking the SoCFPGA Cadence
QSPI support. Any idea whats going wrong here?

Thanks,
Stefan

  parent reply	other threads:[~2015-06-18 12:02 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-17  2:14 [U-Boot] [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes Vikas Manocha
2015-06-17  2:14 ` [U-Boot] [PATCH RESEND 1/7] spi: cadence_qspi: remove sram polling from flash read Vikas Manocha
2015-06-17  2:14 ` [U-Boot] [PATCH RESEND 2/7] spi: cadence_qspi: read can be independent of fifo width Vikas Manocha
2015-06-17  2:14 ` [U-Boot] [PATCH RESEND 3/7] spi: cadence_qspi: remove sram polling from flash write Vikas Manocha
2015-06-17  2:14 ` [U-Boot] [PATCH RESEND 4/7] spi: cadence_qspi: move trigger base configuration in init Vikas Manocha
2015-06-17  2:14 ` [U-Boot] [PATCH RESEND 5/7] spi: cadence_qspi: fix indirect read/write start address Vikas Manocha
2015-06-17  2:14 ` [U-Boot] [PATCH RESEND 6/7] spi: cadence_qspi: fix base trigger address & transfer " Vikas Manocha
2015-06-17  2:14 ` [U-Boot] [PATCH RESEND 7/7] spi: cadence_qspi: get fifo width from device tree Vikas Manocha
2015-06-18 12:02 ` Stefan Roese [this message]
2015-06-18 18:05   ` [U-Boot] [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes Vikas MANOCHA
2015-06-19  6:16     ` Stefan Roese
2015-06-19 21:38       ` Vikas MANOCHA
2015-06-22  8:34         ` Stefan Roese
2015-06-22 23:31           ` Vikas MANOCHA
2015-06-23 14:36             ` Graham Moore
2015-06-23 14:51               ` Vikas MANOCHA
2015-07-02 17:50               ` Vikas MANOCHA
2015-07-06 17:56                 ` Graham Moore
2015-07-06 18:19                   ` Vikas MANOCHA
2015-07-01 16:24           ` Vikas MANOCHA
2015-07-09  1:29           ` Vikas MANOCHA
2015-07-13  9:00             ` Stefan Roese
2015-07-15 21:14               ` Vikas MANOCHA
2015-07-16  6:46                 ` Stefan Roese
2015-07-23 12:22                   ` Stefan Roese
2015-08-11 21:19                     ` vikasm
2015-08-12 11:36                       ` Stefan Roese
2015-08-12 12:01                         ` Jagan Teki
2015-08-12 17:52                           ` vikasm
2015-08-12 20:22                             ` Marek Vasut
2015-08-13  0:16                               ` vikasm
2015-08-13  0:26                                 ` Marek Vasut
2015-08-13  0:36                                   ` vikasm
2015-08-13  2:15                                     ` Marek Vasut

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