[U-Boot] [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes

[Stefan Roese <sr@denx.de>]

Hi Vikas,

On 18.06.2015 20:05, Vikas MANOCHA wrote:

<snip>

>> $ make -s -j10
>> Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable
>> to parse input tree
>> Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable
>> to parse input tree
>> make[2]: *** [arch/arm/dts/socfpga_arria5_socdk.dtb] Error 1
>> make[2]: *** Waiting for unfinished jobs....
>> make[2]: *** [arch/arm/dts/socfpga_cyclone5_socdk.dtb] Error 1
>> Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable
>> to parse input tree
>> make[2]: *** [arch/arm/dts/socfpga_cyclone5_socrates.dtb] Error 1
>>
>> The socfpga.dtsi has incorrect syntax. Here a quick fix for this - please add
>> this to your next version. And please also compile-test for e.g. socrates.
> 
> You are right, semicolon has to be replaced with comma. I will fix it
> in next version & do the compile-test also.

And please also take care of the correct indentation.

>>
>> $ gd
>> diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index
>> a2a2029..448870e 100644
>> --- a/arch/arm/dts/socfpga.dtsi
>> +++ b/arch/arm/dts/socfpga.dtsi
>> @@ -633,8 +633,8 @@
>>                          #address-cells = <1>;
>>                          #size-cells = <0>;
>>                          reg = <0xff705000 0x1000>,
>> -                               <0xffa00000 0x1000>;
>> -                               <0x00000000 0x0010>;
>> +                             <0xffa00000 0x1000>,
>> +                             <0x00000000 0x0010>;
>>                          interrupts = <0 151 4>;
>>                          clocks = <&qspi_clk>;
>>                          ext-decoder = <0>;  /* external decoder */
>>
>>
>> Okay. After installing the resulting image on the SoCrates, I get the following
>> error while reading from SD-card:
>>
>> => sf probe
>> SF: Detected N25Q256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB
>> SF: Warning - Only lower 16MiB accessible, Full access #define
>> CONFIG_SPI_FLASH_BAR => sf read 100000 0 100000
>> QSPI: indirect completion status error with reg 0x0000000c
>> SF: 1048576 bytes @ 0x0 Read: ERROR
>>
>> So there seems to be something breaking the SoCFPGA Cadence QSPI
>> support. Any idea whats going wrong here?
> 
> It means indirect read was not successful. Can you please:
> 
> - please check if "sf write" is also causing some error or is working
>   fine.

Same error.

> - git bisect or cherry-pick to find out which patch is breaking the
>   read functionality.

This one is the first introducing this breakage:

spi: cadence_qspi: fix base trigger address & transfer start address

Here the output from the complete patchset with DEBUG enabled:

=> sf probe
cadence_spi_ofdata_to_platdata: regbase=ff705000 flashbase=ffa00000 trigger_base=00000000 max-frequency=500000          page-size=256
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 1000000Hz Div 0xf
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 1000000Hz Div 0xf
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 500000Hz Div 0xf
SF: Read data capture delay calibrated to 7 (0 - 15)
cadence_spi_set_speed: speed=1000000
cadence_spi_xfer: len=1 [bytes]
cadence_qspi_apb_chipselect : chipselect 0 decode 0
cadence_spi_xfer: len=5 [bytes]
cadence_qspi_apb_chipselect : chipselect 0 decode 0
SF: Detected N25Q256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #define CONFIG_SPI_FLASH_BAR
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 1000000Hz Div 0xf
cadence_spi_set_speed: speed=1000000
=> sf read 200000 100000 10000
cadence_spi_xfer: len=5 [bytes]
cadence_qspi_apb_chipselect : chipselect 0 decode 0
cadence_spi_xfer: len=65536 [bytes]
cadence_qspi_apb_chipselect : chipselect 0 decode 0
QSPI: indirect completion status error with reg 0x0000000c
SF: 65536 bytes @ 0x100000 Read: ERROR

HTP.

Thanks,
Stefan