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From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] qemu-ppce500: Align code at 64k boundary
Date: Mon, 29 Jun 2015 11:17:06 -0700	[thread overview]
Message-ID: <55918BA2.5030106@freescale.com> (raw)
In-Reply-To: <1429756017.16357.12.camel@freescale.com>

Scott,

I lost track on your progress. Please let me know if I should hold this one or
drop it.

York

On 04/22/2015 07:26 PM, Scott Wood wrote:
> On Wed, 2015-04-22 at 18:13 +0200, Alexander Graf wrote:
>> The QEMU u-boot located itself at a 4k aligned offset which the rest
>> of the code didn't really expect. Align it with 64k to allow the memory
>> code to deal with 64k granularity.
>>
>> This fixes broken interrupt delivery with the ppce500 machine for me.
>>
>> Signed-off-by: Alexander Graf <agraf@suse.de>
>> ---
>>  include/configs/qemu-ppce500.h |    2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
>> index 7071849..ec90797 100644
>> --- a/include/configs/qemu-ppce500.h
>> +++ b/include/configs/qemu-ppce500.h
>> @@ -18,7 +18,7 @@
>>  #define CONFIG_QEMU_E500
>>  
>>  #undef CONFIG_SYS_TEXT_BASE
>> -#define CONFIG_SYS_TEXT_BASE	0xf01000 /* 15 MB */
>> +#define CONFIG_SYS_TEXT_BASE	0xf10000 /* 15 MB */
>>  #define CONFIG_SYS_GENERIC_BOARD
>>  
>>  #define CONFIG_SYS_MPC85XX_NO_RESETVEC
> 
> I think we have a similar problem with NAND, SD, etc. boot on some
> targets.  I'll try to fix it so that the existing addresses work.
> 
> -Scott
> 
> 

  reply	other threads:[~2015-06-29 18:17 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-22 16:13 [U-Boot] [PATCH] qemu-ppce500: Align code at 64k boundary Alexander Graf
2015-04-23  2:26 ` Scott Wood
2015-06-29 18:17   ` York Sun [this message]
2015-06-29 18:38     ` Scott Wood

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