From mboxrd@z Thu Jan  1 00:00:00 1970
From: Przemyslaw Marczak <p.marczak@samsung.com>
Date: Wed, 01 Jul 2015 11:44:30 +0200
Subject: [U-Boot] [PATCH v3 39/54] dm: pmic: Add functions to adjust
	PMIC registers
In-Reply-To: <1435095556-15924-40-git-send-email-sjg@chromium.org>
References: <1435095556-15924-1-git-send-email-sjg@chromium.org>
 <1435095556-15924-40-git-send-email-sjg@chromium.org>
Message-ID: <5593B67E.1050106@samsung.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

Hello Simon,

On 06/23/2015 11:39 PM, Simon Glass wrote:
> It is a common requirement to update some PMIC registers. Provide some
> simple convenience functions to do this.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>   drivers/power/pmic/pmic-uclass.c | 32 ++++++++++++++++++++++++++++++++
>   include/power/pmic.h             | 34 ++++++++++++++++++++++++++++++++++
>   2 files changed, 66 insertions(+)
>
> diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
> index 40b5135..dbab3e3 100644
> --- a/drivers/power/pmic/pmic-uclass.c
> +++ b/drivers/power/pmic/pmic-uclass.c
> @@ -139,6 +139,38 @@ int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len)
>   	return ops->write(dev, reg, buffer, len);
>   }
>
> +int pmic_reg_read(struct udevice *dev, uint reg)
> +{
> +	u8 byte;
> +	int ret;
> +
> +	ret = pmic_read(dev, reg, &byte, 1);
> +	debug("%s: reg=%x, value=%x\n", __func__, reg, byte);
> +
> +	return ret ? ret : byte;
> +}
> +
> +int pmic_reg_write(struct udevice *dev, uint reg, uint value)
> +{
> +	u8 byte = value;
> +
> +	debug("%s: reg=%x, value=%x\n", __func__, reg, value);
> +	return pmic_read(dev, reg, &byte, 1);
> +}
> +
> +int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
> +{
> +	u8 byte;
> +	int ret;
> +
> +	ret = pmic_reg_read(dev, reg);
> +	if (ret < 0)
> +		return ret;
> +	byte = (ret & ~clr) | set;
> +
> +	return pmic_reg_write(dev, reg, byte);
> +}
> +
>   UCLASS_DRIVER(pmic) = {
>   	.id		= UCLASS_PMIC,
>   	.name		= "pmic",
> diff --git a/include/power/pmic.h b/include/power/pmic.h
> index eb152ef..6ba4b6e 100644
> --- a/include/power/pmic.h
> +++ b/include/power/pmic.h
> @@ -264,6 +264,40 @@ int pmic_reg_count(struct udevice *dev);
>    */
>   int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len);
>   int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len);
> +
> +/**
> + * pmic_reg_read() - read a PMIC register value
> + *
> + * @dev:	PMIC device to read
> + * @reg:	Register to read
> + * @return value read on success or negative value of errno.
> + */
> +int pmic_reg_read(struct udevice *dev, uint reg);
> +
> +/**
> + * pmic_reg_write() - write a PMIC register value
> + *
> + * @dev:	PMIC device to write
> + * @reg:	Register to write
> + * @value:	Value to write
> + * @return 0 on success or negative value of errno.
> + */
> +int pmic_reg_write(struct udevice *dev, uint reg, uint value);
> +
> +/**
> + * pmic_clrsetbits() - clear and set bits in a PMIC register
> + *
> + * This reads a register, optionally clears some bits, optionally sets some
> + * bits, then writes the register.
> + *
> + * @dev:	PMIC device to update
> + * @reg:	Register to update
> + * @clr:	Bit mask to clear (set those bits that you want cleared)
> + * @set:	Bit mask to set (set those bits that you want set)
> + * @return 0 on success or negative value of errno.
> + */
> +int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
> +
>   #endif /* CONFIG_DM_PMIC */
>
>   #ifdef CONFIG_POWER
>

Tested on:
- Odroid U3 (odroid_defconfig)
- Sandbox - ut pmic/regulator

Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>

Best regards,
-- 
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com