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From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH V4 1/6] imx: add dummpy cpu type MXC_CPU_MX6QP/DP
Date: Fri, 10 Jul 2015 15:08:55 +0200	[thread overview]
Message-ID: <559FC3E7.6090203@denx.de> (raw)
In-Reply-To: <20150710080559.GA30751@shlinux2>

Hi Peng,

On 10/07/2015 10:06, Peng Fan wrote:

>> Anyway, why is it dummy ? It matches a real SOC, only the check is done
>> in another way.
> 
> Just like MXC_CPU_MX6Q and MXC_CPU_MX6D. MXC_CPU_MX6D is a dummy id,
> MXC_CPU_MX6Q is the real id. Same MXC_CPU_MX6QP/DP are also dummy id.

ok, that is what you meant, understood. It is only that value is not
exactly what we read from DIGIPROG register. The title and commit
message let me think that "the cpu type " is dummy, that is it does not
exist, while the CPU-ID is only built with a formula instead of getting
the value from the register.

IMHO it was enough you simply say "add CPU type for 6QP/DP", dropping
the first part of the commit message that is misleading.


> Since I want to print correct CPU info, so I use this way, but not
> change arch/arm/imx-common/cpu.c.

This is ok, agree.


>> Everything fine, but I have not understood this line, please help me.
>> major is the revision number and should be at least 2 for a QP or DP.
>> But you check that it can be >=, that is revision 1.x is accepted as
>> Plus. Or am I wrong ?
> 
> To i.MX6, MAJOR_LOWER is from 0,1,2... maybe larger.
> I have no knowledge whether major_lower with 2,3,4... is also called DQPlus.
> 6QP/DP is major_lower >= 1, major_lower 0 is for 6DQ.

ok, thanks - this is clear now.

> Now ">= 1" can work
> for 6QP/DP, just check "== 1" may not a good idea.
> 
> Is this clear to explain why this patch?

yes, it is ok. I was missing that even major_lower = 1 is a Plus. Fine
with me.

> 
> The reason for this patch is to print correct cpuinfo:
> 
> printf("CPU:   Freescale i.MX%s rev%d.%d",
> 	   get_imx_type((cpurev & 0xFF000) >> 12),
> 	   (cpurev & 0x000F0) >> 4,
> 	   (cpurev & 0x0000F) >> 0);
> 
> As Fabio's comments, should print i.MX6QP 1.0, but i.MX6Q rev2.0.

ok

Apart interpretation of the commit message, patch is ok for me.

Acked-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic



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      reply	other threads:[~2015-07-10 13:08 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-30  2:36 [U-Boot] [PATCH V4 1/6] imx: add dummpy cpu type MXC_CPU_MX6QP/DP Peng Fan
2015-06-30  2:36 ` [U-Boot] [PATCH V4 2/6] imx: mx6: ccm: Change the clock settings for i.MX6QP Peng Fan
2015-07-10  8:34   ` Stefano Babic
2015-06-30  2:36 ` [U-Boot] [PATCH V4 3/6] imx: mx6: hab : Remove the cache issue workaroud in hab " Peng Fan
2015-07-10  8:35   ` Stefano Babic
2015-06-30  2:36 ` [U-Boot] [PATCH V4 4/6] imx: mx6qp Enable PRG clock for IPU Peng Fan
2015-07-10  8:35   ` Stefano Babic
2015-06-30  2:36 ` [U-Boot] [PATCH V4 5/6] imx: mx6sabresd/sabreauto runtime setting fdt_file Peng Fan
2015-07-10  8:35   ` Stefano Babic
2015-06-30  2:36 ` [U-Boot] [PATCH V4 6/6] imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board support Peng Fan
2015-07-10  8:30 ` [U-Boot] [PATCH V4 1/6] imx: add dummpy cpu type MXC_CPU_MX6QP/DP Stefano Babic
2015-07-10  8:06   ` Peng Fan
2015-07-10 13:08     ` Stefano Babic [this message]

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