[U-Boot] [PATCH 2/4] nand: lpc32xx: add SLC NAND controller support

Vladimir Zapolskiy
2015-07-16T20:18:20Z

Hello Scott,

On 16.07.2015 23:14, Scott Wood wrote:
> On Thu, 2015-07-16 at 14:53 +0200, Albert ARIBAUD wrote:
>> Hello Vladimir,
>>
>> On Thu, 16 Jul 2015 02:33:46 +0300, Vladimir Zapolskiy <vz@mleia.com>
>> wrote:
>>
>>> diff --git a/drivers/mtd/nand/lpc32xx_nand_slc.c
>>> b/drivers/mtd/nand/lpc32xx_nand_slc.c
>>> new file mode 100644
>>
>>> +int board_nand_init(struct nand_chip *lpc32xx_chip)
>>> +{
>>> + lpc32xx_chip->IO_ADDR_R = &lpc32xx_nand_slc_registers->data;
>>> + lpc32xx_chip->IO_ADDR_W = &lpc32xx_nand_slc_registers->data;
>>
>> Consistent with my comment re nand_simpl.c, I think that the two
>> assignments above are incorrect since the data register may not provide
>> general access to the NAND's I/O lines, and is not 8-bit accessible
>> even though the NAND is 8-bit wide.
>>
>> If Scott give his go, though, disregard my comment.
>
> I agree with Albert -- if you need custom accessors, there's no benefit to
> using IO_ADDR_R/W, and it could make it harder to debug if some user of
> IO_ADDR_R/W is missed.

No objections from my side regarding this notice, I'll remove these two
lines in v2. Please let me know, if you notice something else, what can
be improved.

--
With best wishes,
Vladimir