[U-Boot] [PATCH 2/4] nand: lpc32xx: add SLC NAND controller support

[Vladimir Zapolskiy <vz@mleia.com>]

On 16.07.2015 23:20, Scott Wood wrote:
> On Thu, 2015-07-16 at 02:33 +0300, Vladimir Zapolskiy wrote:
>> +static void lpc32xx_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
>> +{
>> +     while (len-- > 0)
>> +             *buf++ = (uint8_t)readl(&lpc32xx_nand_slc_registers->data);
>> +}
>> +
>> +static uint8_t lpc32xx_read_byte(struct mtd_info *mtd)
>> +{
>> +     return (uint8_t)readl(&lpc32xx_nand_slc_registers->data);
>> +}
>> +
>> +static void lpc32xx_write_buf(struct mtd_info *mtd, const uint8_t *buf, 
>> int len)
>> +{
>> +     while (len-- > 0)
>> +             writel((uint32_t)*buf++, &lpc32xx_nand_slc_registers->data);
>> +}
>> +
>> +static void lpc32xx_write_byte(struct mtd_info *mtd, uint8_t byte)
>> +{
>> +     writel((uint32_t)byte, &lpc32xx_nand_slc_registers->data);
>> +}
> 
> Unnecessary casts.

Ok.

>> +     /*
>> +      * Hardware ECC calculation is not supported by the driver, because it
>> +      * requires DMA support, see Note after SLC_ECC register description
>> +      */
>> +     lpc32xx_chip->ecc.mode  = NAND_ECC_SOFT;
> 
> Where can I find this note?  I don't see any  "SLC_ECC register description".

This is a reference to SLC_ECC register description from LPC32xx User's
Manual, will state it clearly in v2.

>> +#if defined(CONFIG_SPL_BUILD)
>> +     lpc32xx_chip->options           |= NAND_SKIP_BBTSCAN;
>> +#endif
> 
> Does this make any difference?  nand_spl_simple will not do a bbt scan in any 
> case.

Agree, I will remove it.

--
With best wishes,
Vladimir