From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Wed, 22 Jul 2015 11:44:35 -0600 Subject: [U-Boot] [PATCH V2 3/6] ARM: Tegra210: Add SoC code/include files for T210 In-Reply-To: <1437421844-5157-4-git-send-email-twarren@nvidia.com> References: <1437421844-5157-1-git-send-email-twarren@nvidia.com> <1437421844-5157-4-git-send-email-twarren@nvidia.com> Message-ID: <55AFD683.4000701@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/20/2015 01:50 PM, Tom Warren wrote: > All based off of Tegra124. As a Tegra210 board is brought > up, these may change a bit to match the HW more closely, > but probably 90% of this is identical to T124. > > Note that since T210 is a 64-bit build, it has no SPL > component, and hence no cpu.c for Tegra210. > diff --git a/arch/arm/mach-tegra/tegra210/funcmux.c b/arch/arm/mach-tegra/tegra210/funcmux.c > +int funcmux_select(enum periph_id id, int config) > +{ > + int bad_config = config != FUNCMUX_DEFAULT; > + > + switch (id) { > + case PERIPH_ID_UART4: > + switch (config) { > + case FUNCMUX_UART4_GPIO: /* TXD,RXD,CTS,RTS */ > + pinmux_set_func(PMUX_PINGRP_UART4_TX_PI4, > + PMUX_FUNC_UARTD); > + pinmux_set_func(PMUX_PINGRP_UART4_RX_PI5, > + PMUX_FUNC_UARTD); > + pinmux_set_func(PMUX_PINGRP_UART4_CTS_PI7, > + PMUX_FUNC_UARTD); > + pinmux_set_func(PMUX_PINGRP_UART4_RTS_PI6, > + PMUX_FUNC_UARTD); ... > + case PERIPH_ID_UART1: > + switch (config) { > + case FUNCMUX_UART1_KBC: > + pinmux_set_func(PMUX_PINGRP_UART1_TX_PU0, > + PMUX_FUNC_UARTA); > + pinmux_set_func(PMUX_PINGRP_UART1_RX_PU1, Those are the wrong FUNCMUX_* enum names; they're supposed to be FUNCMUX_${hwblock}_${pinset}. ${hwblock} is correctly UART1/4 above. ${pinset} doesn't look right to me; I see no GPIO or KBC pins being used. Rather, I'd expect FUNCMUX_UART4_UART4 and FUNCMUX_UART1_UART1.