From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Warren <swarren@wwwdotorg.org>
Date: Wed, 22 Jul 2015 11:57:19 -0600
Subject: [U-Boot] [PATCH V2 5/6] P2571: dts: Add DT files for
 Tegra210/P2571 board
In-Reply-To: <1437421844-5157-6-git-send-email-twarren@nvidia.com>
References: <1437421844-5157-1-git-send-email-twarren@nvidia.com>
 <1437421844-5157-6-git-send-email-twarren@nvidia.com>
Message-ID: <55AFD97F.1090203@wwwdotorg.org>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 07/20/2015 01:50 PM, Tom Warren wrote:
> Based on T124 Venice2. SDMMC1 is SD-card slot.

I would expect the SoC DT file to be part of the previous patch which 
adds Tegra210 support.

I would expect the P2571 file to be part of the next patch which adds 
P2571 board support.

> diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra210.dtsi

I'd expect many more changes in this file, to add the tegra210 
compatible values to the compatible properties (or replace the tegra124 
values with tegra210 as appropriate depending on actual HW compatibility).

Also, both #address-cells=<2> and #size-cells=<2> should be present, 
since this is a 64-bit SoC. That'd also require that all reg values be 
updated to include 2 cells for address and size, and the unit address in 
the node names to be updated.

>   	pwm: pwm at 7000a000 {
>   		compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
>   		reg = <0x7000a000 0x100>;

For example, that should probably be:

pwm: pwm at 0,7000a000 {
	compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm";
	reg = <0 0x7000a000 0 0x100>;
}

(Assuming the new PWM HW module is still a 100%-backwards-compatible 
superset of Tegra20 PWM)

Fixing this issue might mean depending on more of Thierry's local 64-bit 
fixes, especially w.r.t. DT parsing. I'm not sure.