From: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/1] driver: net: keystone_net: fix phy mode configuration
Date: Thu, 23 Jul 2015 16:38:02 +0300 [thread overview]
Message-ID: <55B0EE3A.4040101@linaro.org> (raw)
In-Reply-To: <55B0E165.8020805@ti.com>
On 23.07.15 15:43, Mugunthan V N wrote:
> On Thursday 23 July 2015 04:46 PM, Ivan Khoronzhuk wrote:
>> Hi, Mugunthan
>>
>> You are right, phy mode is a board property.
>> But just for clarifying, does Ethernet SS, which contains SGMII
>> on board, support another i/f mode except SGMII? Can it work
>> w/o SerDes?
>
> There is a upcoming SoC (K2E) using the same IP with RGMII phy
> connected. So the IP is capable of supporting multiple phy modes.
>
> Regards
> Mugunthan V N
>
Then I would ask you to add it in commit message.
Also, if it can work in RGMII mode, could you please check if a
following errata doesn't affect you configuration.
This is only for Marvell phys, and if it's your case, it be good,
probably, to extend it`s impact on RGMII mode also.
net: phy: marvell: add errata w/a for 88E151* chips
35fa0dda0ccee8075b1ef8922e930d5dcdea9f5e
next prev parent reply other threads:[~2015-07-23 13:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-23 9:01 [U-Boot] [PATCH 1/1] driver: net: keystone_net: fix phy mode configuration Mugunthan V N
2015-07-23 11:16 ` Ivan Khoronzhuk
2015-07-23 12:43 ` Mugunthan V N
2015-07-23 13:38 ` Ivan Khoronzhuk [this message]
2015-07-23 14:14 ` Mugunthan V N
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