* [U-Boot] [PATCH 1/1] driver: net: keystone_net: fix phy mode configuration
@ 2015-07-23 9:01 Mugunthan V N
2015-07-23 11:16 ` Ivan Khoronzhuk
0 siblings, 1 reply; 5+ messages in thread
From: Mugunthan V N @ 2015-07-23 9:01 UTC (permalink / raw)
To: u-boot
Phy mode is a board property and it can be different between
multiple board and ports, so it should not be hardcoded in
driver to one specific mode. So adding a field in eth_priv_t
structure to pass phy mode to driver.
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/include/asm/ti-common/keystone_net.h | 2 ++
board/ti/ks2_evm/board_k2e.c | 8 ++++++++
board/ti/ks2_evm/board_k2hk.c | 4 ++++
board/ti/ks2_evm/board_k2l.c | 4 ++++
drivers/net/keystone_net.c | 4 ++--
5 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h
index 011c03c..235a9fa 100644
--- a/arch/arm/include/asm/ti-common/keystone_net.h
+++ b/arch/arm/include/asm/ti-common/keystone_net.h
@@ -11,6 +11,7 @@
#define _KEYSTONE_NET_H_
#include <asm/io.h>
+#include <phy.h>
/* EMAC */
#ifdef CONFIG_KSNET_NETCP_V1_0
@@ -239,6 +240,7 @@ struct eth_priv_t {
int phy_addr;
int slave_port;
int sgmii_link_type;
+ phy_interface_t phy_if;
struct phy_device *phy_dev;
};
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index 43dfc48..59c6516 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -47,6 +47,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC1",
@@ -54,6 +55,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC2",
@@ -61,6 +63,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC3",
@@ -68,6 +71,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC4",
@@ -75,6 +79,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 4,
.slave_port = 5,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC5",
@@ -82,6 +87,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 5,
.slave_port = 6,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC6",
@@ -89,6 +95,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 6,
.slave_port = 7,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC7",
@@ -96,6 +103,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 7,
.slave_port = 8,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index ed181f4..acd4205 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -54,6 +54,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC1",
@@ -61,6 +62,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC2",
@@ -68,6 +70,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC3",
@@ -75,6 +78,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index 729a193..41e7f70 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -50,6 +50,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC1",
@@ -57,6 +58,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC2",
@@ -64,6 +66,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC3",
@@ -71,6 +74,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index 0c5fdee..21e17bf 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -559,11 +559,11 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv)
/* Create phy device and bind it with driver */
#ifdef CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
phy_dev = phy_connect(mdio_bus, eth_priv->phy_addr,
- dev, PHY_INTERFACE_MODE_SGMII);
+ dev, eth_priv->phy_if);
phy_config(phy_dev);
#else
phy_dev = phy_find_by_mask(mdio_bus, 1 << eth_priv->phy_addr,
- PHY_INTERFACE_MODE_SGMII);
+ eth_priv->phy_if);
phy_dev->dev = dev;
#endif
eth_priv->phy_dev = phy_dev;
--
2.5.0.rc2.13.g961abca
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 1/1] driver: net: keystone_net: fix phy mode configuration
2015-07-23 9:01 [U-Boot] [PATCH 1/1] driver: net: keystone_net: fix phy mode configuration Mugunthan V N
@ 2015-07-23 11:16 ` Ivan Khoronzhuk
2015-07-23 12:43 ` Mugunthan V N
0 siblings, 1 reply; 5+ messages in thread
From: Ivan Khoronzhuk @ 2015-07-23 11:16 UTC (permalink / raw)
To: u-boot
Hi, Mugunthan
You are right, phy mode is a board property.
But just for clarifying, does Ethernet SS, which contains SGMII
on board, support another i/f mode except SGMII? Can it work
w/o SerDes?
On 23.07.15 12:01, Mugunthan V N wrote:
> Phy mode is a board property and it can be different between
> multiple board and ports, so it should not be hardcoded in
> driver to one specific mode. So adding a field in eth_priv_t
> structure to pass phy mode to driver.
>
> Cc: Murali Karicheri <m-karicheri2@ti.com>
> Cc: Lokesh Vutla <lokeshvutla@ti.com>
> Cc: Vitaly Andrianov <vitalya@ti.com>
> Cc: Joe Hershberger <joe.hershberger@ni.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
> arch/arm/include/asm/ti-common/keystone_net.h | 2 ++
> board/ti/ks2_evm/board_k2e.c | 8 ++++++++
> board/ti/ks2_evm/board_k2hk.c | 4 ++++
> board/ti/ks2_evm/board_k2l.c | 4 ++++
> drivers/net/keystone_net.c | 4 ++--
> 5 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h
> index 011c03c..235a9fa 100644
> --- a/arch/arm/include/asm/ti-common/keystone_net.h
> +++ b/arch/arm/include/asm/ti-common/keystone_net.h
> @@ -11,6 +11,7 @@
> #define _KEYSTONE_NET_H_
>
> #include <asm/io.h>
> +#include <phy.h>
>
> /* EMAC */
> #ifdef CONFIG_KSNET_NETCP_V1_0
> @@ -239,6 +240,7 @@ struct eth_priv_t {
> int phy_addr;
> int slave_port;
> int sgmii_link_type;
> + phy_interface_t phy_if;
> struct phy_device *phy_dev;
> };
>
> diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
> index 43dfc48..59c6516 100644
> --- a/board/ti/ks2_evm/board_k2e.c
> +++ b/board/ti/ks2_evm/board_k2e.c
> @@ -47,6 +47,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 0,
> .slave_port = 1,
> .sgmii_link_type = SGMII_LINK_MAC_PHY,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2E_EMAC1",
> @@ -54,6 +55,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 1,
> .slave_port = 2,
> .sgmii_link_type = SGMII_LINK_MAC_PHY,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2E_EMAC2",
> @@ -61,6 +63,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 2,
> .slave_port = 3,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2E_EMAC3",
> @@ -68,6 +71,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 3,
> .slave_port = 4,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2E_EMAC4",
> @@ -75,6 +79,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 4,
> .slave_port = 5,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2E_EMAC5",
> @@ -82,6 +87,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 5,
> .slave_port = 6,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2E_EMAC6",
> @@ -89,6 +95,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 6,
> .slave_port = 7,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2E_EMAC7",
> @@ -96,6 +103,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 7,
> .slave_port = 8,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> };
>
> diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
> index ed181f4..acd4205 100644
> --- a/board/ti/ks2_evm/board_k2hk.c
> +++ b/board/ti/ks2_evm/board_k2hk.c
> @@ -54,6 +54,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 0,
> .slave_port = 1,
> .sgmii_link_type = SGMII_LINK_MAC_PHY,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2HK_EMAC1",
> @@ -61,6 +62,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 1,
> .slave_port = 2,
> .sgmii_link_type = SGMII_LINK_MAC_PHY,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2HK_EMAC2",
> @@ -68,6 +70,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 2,
> .slave_port = 3,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2HK_EMAC3",
> @@ -75,6 +78,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 3,
> .slave_port = 4,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> };
>
> diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
> index 729a193..41e7f70 100644
> --- a/board/ti/ks2_evm/board_k2l.c
> +++ b/board/ti/ks2_evm/board_k2l.c
> @@ -50,6 +50,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 0,
> .slave_port = 1,
> .sgmii_link_type = SGMII_LINK_MAC_PHY,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2L_EMAC1",
> @@ -57,6 +58,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 1,
> .slave_port = 2,
> .sgmii_link_type = SGMII_LINK_MAC_PHY,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2L_EMAC2",
> @@ -64,6 +66,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 2,
> .slave_port = 3,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> {
> .int_name = "K2L_EMAC3",
> @@ -71,6 +74,7 @@ struct eth_priv_t eth_priv_cfg[] = {
> .phy_addr = 3,
> .slave_port = 4,
> .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
> + .phy_if = PHY_INTERFACE_MODE_SGMII,
> },
> };
>
> diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
> index 0c5fdee..21e17bf 100644
> --- a/drivers/net/keystone_net.c
> +++ b/drivers/net/keystone_net.c
> @@ -559,11 +559,11 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv)
> /* Create phy device and bind it with driver */
> #ifdef CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
> phy_dev = phy_connect(mdio_bus, eth_priv->phy_addr,
> - dev, PHY_INTERFACE_MODE_SGMII);
> + dev, eth_priv->phy_if);
> phy_config(phy_dev);
> #else
> phy_dev = phy_find_by_mask(mdio_bus, 1 << eth_priv->phy_addr,
> - PHY_INTERFACE_MODE_SGMII);
> + eth_priv->phy_if);
> phy_dev->dev = dev;
> #endif
> eth_priv->phy_dev = phy_dev;
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 1/1] driver: net: keystone_net: fix phy mode configuration
2015-07-23 11:16 ` Ivan Khoronzhuk
@ 2015-07-23 12:43 ` Mugunthan V N
2015-07-23 13:38 ` Ivan Khoronzhuk
0 siblings, 1 reply; 5+ messages in thread
From: Mugunthan V N @ 2015-07-23 12:43 UTC (permalink / raw)
To: u-boot
On Thursday 23 July 2015 04:46 PM, Ivan Khoronzhuk wrote:
> Hi, Mugunthan
>
> You are right, phy mode is a board property.
> But just for clarifying, does Ethernet SS, which contains SGMII
> on board, support another i/f mode except SGMII? Can it work
> w/o SerDes?
There is a upcoming SoC (K2E) using the same IP with RGMII phy
connected. So the IP is capable of supporting multiple phy modes.
Regards
Mugunthan V N
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 1/1] driver: net: keystone_net: fix phy mode configuration
2015-07-23 12:43 ` Mugunthan V N
@ 2015-07-23 13:38 ` Ivan Khoronzhuk
2015-07-23 14:14 ` Mugunthan V N
0 siblings, 1 reply; 5+ messages in thread
From: Ivan Khoronzhuk @ 2015-07-23 13:38 UTC (permalink / raw)
To: u-boot
On 23.07.15 15:43, Mugunthan V N wrote:
> On Thursday 23 July 2015 04:46 PM, Ivan Khoronzhuk wrote:
>> Hi, Mugunthan
>>
>> You are right, phy mode is a board property.
>> But just for clarifying, does Ethernet SS, which contains SGMII
>> on board, support another i/f mode except SGMII? Can it work
>> w/o SerDes?
>
> There is a upcoming SoC (K2E) using the same IP with RGMII phy
> connected. So the IP is capable of supporting multiple phy modes.
>
> Regards
> Mugunthan V N
>
Then I would ask you to add it in commit message.
Also, if it can work in RGMII mode, could you please check if a
following errata doesn't affect you configuration.
This is only for Marvell phys, and if it's your case, it be good,
probably, to extend it`s impact on RGMII mode also.
net: phy: marvell: add errata w/a for 88E151* chips
35fa0dda0ccee8075b1ef8922e930d5dcdea9f5e
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 1/1] driver: net: keystone_net: fix phy mode configuration
2015-07-23 13:38 ` Ivan Khoronzhuk
@ 2015-07-23 14:14 ` Mugunthan V N
0 siblings, 0 replies; 5+ messages in thread
From: Mugunthan V N @ 2015-07-23 14:14 UTC (permalink / raw)
To: u-boot
On Thursday 23 July 2015 07:08 PM, Ivan Khoronzhuk wrote:
>
>
> On 23.07.15 15:43, Mugunthan V N wrote:
>> On Thursday 23 July 2015 04:46 PM, Ivan Khoronzhuk wrote:
>>> Hi, Mugunthan
>>>
>>> You are right, phy mode is a board property.
>>> But just for clarifying, does Ethernet SS, which contains SGMII
>>> on board, support another i/f mode except SGMII? Can it work
>>> w/o SerDes?
>>
>> There is a upcoming SoC (K2E) using the same IP with RGMII phy
>> connected. So the IP is capable of supporting multiple phy modes.
>>
>> Regards
>> Mugunthan V N
>>
>
> Then I would ask you to add it in commit message.
> Also, if it can work in RGMII mode, could you please check if a
> following errata doesn't affect you configuration.
> This is only for Marvell phys, and if it's your case, it be good,
> probably, to extend it`s impact on RGMII mode also.
>
> net: phy: marvell: add errata w/a for 88E151* chips
> 35fa0dda0ccee8075b1ef8922e930d5dcdea9f5e
It uses Micrel phy.
Regards
Mugunthan V N
^ permalink raw reply [flat|nested] 5+ messages in thread
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2015-07-23 11:16 ` Ivan Khoronzhuk
2015-07-23 12:43 ` Mugunthan V N
2015-07-23 13:38 ` Ivan Khoronzhuk
2015-07-23 14:14 ` Mugunthan V N
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