[U-Boot] [PATCH 6/8] ARM: keystone2: Cleanup init_pll definition

Lokesh Vutla
2015-07-24T04:20:06Z

Hi Vitaly,
On Thursday 23 July 2015 11:31 PM, Vitaly Andrianov wrote:
>
>
> On 07/22/2015 11:39 AM, Lokesh Vutla wrote:
>> This is just a cosmetic change that makes
>> the calling of pll init code looks much cleaner.
>>
>> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
>> ---
>> arch/arm/mach-keystone/clock.c | 12 ++++++---
>> arch/arm/mach-keystone/include/mach/clock.h | 3 ++-
>> board/ti/ks2_evm/board_k2e.c | 33
>> +++++++++++++++--------
>> board/ti/ks2_evm/board_k2hk.c | 41
>> ++++++++++++++++++-----------
>> board/ti/ks2_evm/board_k2l.c | 41
>> ++++++++++++++++++-----------
>> 5 files changed, 84 insertions(+), 46 deletions(-)
>>
>> diff --git a/arch/arm/mach-keystone/clock.c
>> b/arch/arm/mach-keystone/clock.c
>> index f60a0b8..824a6ce 100644
>> --- a/arch/arm/mach-keystone/clock.c
>> +++ b/arch/arm/mach-keystone/clock.c
>> @@ -191,12 +191,16 @@ void init_pll(const struct pll_init_data *data)
>> configure_secondary_pll(data);
>> }
>>
>> -void init_plls(int num_pll, struct pll_init_data *config)
>> +void init_plls(void)
>> {
>> - int i;
>> + struct pll_init_data *data;
>> + int pll;
>>
>> - for (i = 0; i < num_pll; i++)
>> - init_pll(&config[i]);
>> + for (pll = MAIN_PLL; pll < MAX_PLL_COUNT; pll++) {
>> + data = get_pll_init_data(pll);
>> + if (data)
>> + init_pll(data);
>> + }
>> }
>>
> Does the MAX_PLL_COUNT represent all PLLs on board?
It includes all except DDR. I haven't touched DDR yet.
> If that is true, I think the patch is incorrect.
> If you look at the history of the PLL configuration code you will find
> that we had this cod in the past and changed it.
May I know why DDR pll cannot be initialized along with other PLLs?
>
> The currently working code doesn't configure all PLLs an advance.
> For example DDR3a PLLs is configured later, after getting information
> about required DDR3 speed. Also the current version of code doesn't
> configure DDR3B at all. And I don't see any reason why do we need to
> change it.
So, get_pll_init_data() is defined in every board file and passes the
correct
pll data. If pll is not available, it passes NULL so pll is not initialized.

Instead of calling init_pll for each pll separately, I made a single
function
which takes care of all this stuff.

Thanks and regards,
Lokesh
>
>
>
>
>> static int get_max_speed(u32 val, u32 speed_supported)
>> diff --git a/arch/arm/mach-keystone/include/mach/clock.h
>> b/arch/arm/mach-keystone/include/mach/clock.h
>> index dc3c56a..ea7d8bc 100644
>> --- a/arch/arm/mach-keystone/include/mach/clock.h
>> +++ b/arch/arm/mach-keystone/include/mach/clock.h
>> @@ -73,8 +73,9 @@ extern const struct keystone_pll_regs
>> keystone_pll_regs[];
>> extern int dev_speeds[];
>> extern int arm_speeds[];
>>
>> -void init_plls(int num_pll, struct pll_init_data *config);
>> +void init_plls(void);
>> void init_pll(const struct pll_init_data *data);
>> +struct pll_init_data *get_pll_init_data(int pll);
>> unsigned long clk_get_rate(unsigned int clk);
>> unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
>> int clk_set_rate(unsigned int clk, unsigned long hz);
>> diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
>> index 6d98b2a..82792ef 100644
>> --- a/board/ti/ks2_evm/board_k2e.c
>> +++ b/board/ti/ks2_evm/board_k2e.c
>> @@ -38,6 +38,26 @@ static struct pll_init_data core_pll_config[] = {
>> static struct pll_init_data pa_pll_config =
>> PASS_PLL_1000;
>>
>> +struct pll_init_data *get_pll_init_data(int pll)
>> +{
>> + int speed;
>> + struct pll_init_data *data;
>> +
>> + switch (pll) {
>> + case MAIN_PLL:
>> + speed = get_max_dev_speed();
>> + data = &core_pll_config[speed];
>> + break;
>> + case PASS_PLL:
>> + data = &pa_pll_config;
>> + break;
>> + default:
>> + data = NULL;
>> + }
>> +
>> + return data;
>> +}
>> +
>> #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
>> struct eth_priv_t eth_priv_cfg[] = {
>> {
>> @@ -107,24 +127,15 @@ int get_num_eth_ports(void)
>> #if defined(CONFIG_BOARD_EARLY_INIT_F)
>> int board_early_init_f(void)
>> {
>> - int speed;
>> -
>> - speed = get_max_dev_speed();
>> - init_pll(&core_pll_config[speed]);
>> -
>> - init_pll(&pa_pll_config);
>> + init_plls();
>>
>> return 0;
>> }
>> #endif
>>
>> #ifdef CONFIG_SPL_BUILD
>> -static struct pll_init_data spl_pll_config[] = {
>> - CORE_PLL_800,
>> -};
>> -
>> void spl_init_keystone_plls(void)
>> {
>> - init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
>> + init_plls();
>> }
>> #endif
>> diff --git a/board/ti/ks2_evm/board_k2hk.c
>> b/board/ti/ks2_evm/board_k2hk.c
>> index ed181f4..cec6c02 100644
>> --- a/board/ti/ks2_evm/board_k2hk.c
>> +++ b/board/ti/ks2_evm/board_k2hk.c
>> @@ -46,6 +46,30 @@ static struct pll_init_data tetris_pll_config[] = {
>> static struct pll_init_data pa_pll_config =
>> PASS_PLL_983;
>>
>> +struct pll_init_data *get_pll_init_data(int pll)
>> +{
>> + int speed;
>> + struct pll_init_data *data;
>> +
>> + switch (pll) {
>> + case MAIN_PLL:
>> + speed = get_max_dev_speed();
>> + data = &core_pll_config[speed];
>> + break;
>> + case TETRIS_PLL:
>> + speed = get_max_arm_speed();
>> + data = &tetris_pll_config[speed];
>> + break;
>> + case PASS_PLL:
>> + data = &pa_pll_config;
>> + break;
>> + default:
>> + data = NULL;
>> + }
>> +
>> + return data;
>> +}
>> +
>> #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
>> struct eth_priv_t eth_priv_cfg[] = {
>> {
>> @@ -87,28 +111,15 @@ int get_num_eth_ports(void)
>> #ifdef CONFIG_BOARD_EARLY_INIT_F
>> int board_early_init_f(void)
>> {
>> - int speed;
>> -
>> - speed = get_max_dev_speed();
>> - init_pll(&core_pll_config[speed]);
>> -
>> - init_pll(&pa_pll_config);
>> -
>> - speed = get_max_arm_speed();
>> - init_pll(&tetris_pll_config[speed]);
>> + init_plls();
>>
>> return 0;
>> }
>> #endif
>>
>> #ifdef CONFIG_SPL_BUILD
>> -static struct pll_init_data spl_pll_config[] = {
>> - CORE_PLL_799,
>> - TETRIS_PLL_500,
>> -};
>> -
>> void spl_init_keystone_plls(void)
>> {
>> - init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
>> + init_plls();
>> }
>> #endif
>> diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
>> index 729a193..1b4d086 100644
>> --- a/board/ti/ks2_evm/board_k2l.c
>> +++ b/board/ti/ks2_evm/board_k2l.c
>> @@ -42,6 +42,30 @@ static struct pll_init_data tetris_pll_config[] = {
>> static struct pll_init_data pa_pll_config =
>> PASS_PLL_983;
>>
>> +struct pll_init_data *get_pll_init_data(int pll)
>> +{
>> + int speed;
>> + struct pll_init_data *data;
>> +
>> + switch (pll) {
>> + case MAIN_PLL:
>> + speed = get_max_dev_speed();
>> + data = &core_pll_config[speed];
>> + break;
>> + case TETRIS_PLL:
>> + speed = get_max_arm_speed();
>> + data = &tetris_pll_config[speed];
>> + break;
>> + case PASS_PLL:
>> + data = &pa_pll_config;
>> + break;
>> + default:
>> + data = NULL;
>> + }
>> +
>> + return data;
>> +}
>> +
>> #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
>> struct eth_priv_t eth_priv_cfg[] = {
>> {
>> @@ -83,28 +107,15 @@ int get_num_eth_ports(void)
>> #ifdef CONFIG_BOARD_EARLY_INIT_F
>> int board_early_init_f(void)
>> {
>> - int speed;
>> -
>> - speed = get_max_dev_speed();
>> - init_pll(&core_pll_config[speed]);
>> -
>> - init_pll(&pa_pll_config);
>> -
>> - speed = get_max_arm_speed();
>> - init_pll(&tetris_pll_config[speed]);
>> + init_plls();
>>
>> return 0;
>> }
>> #endif
>>
>> #ifdef CONFIG_SPL_BUILD
>> -static struct pll_init_data spl_pll_config[] = {
>> - CORE_PLL_799,
>> - TETRIS_PLL_491,
>> -};
>> -
>> void spl_init_keystone_plls(void)
>> {
>> - init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
>> + init_plls();
>> }
>> #endif
>>