From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Warren <swarren@wwwdotorg.org>
Date: Thu, 23 Jul 2015 22:54:05 -0600
Subject: [U-Boot] [PATCH v3 3/7] ARM: bcm283x: Define
	CONFIG_SYS_CACHELINE_SIZE
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References: <1437589418-11978-1-git-send-email-alexanders83@web.de>
 <1437589418-11978-4-git-send-email-alexanders83@web.de>
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On 07/22/2015 12:23 PM, Alexander Stein wrote:
> The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
> config level for cache handling code.

>  include/configs/rpi-common.h | 1 +

This file applies to both RPi 1 and RPi 2. Do they have the same
cacheline size?