[U-Boot] [PATCH v3 3/7] ARM: bcm283x: Define CONFIG_SYS_CACHELINE_SIZE

Alexander Stein
2015-07-22T18:23:34Z

The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.

Signed-off-by: Alexander Stein <alexanders83@web.de>
---
include/configs/rpi-common.h | 1 +
1 file changed, 1 insertion(+)

diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h
index 1012cdd..e75fb1e 100644
--- a/include/configs/rpi-common.h
+++ b/include/configs/rpi-common.h
@@ -15,6 +15,7 @@
#define CONFIG_BCM2835
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_SYS_CACHELINE_SIZE 32

#define CONFIG_SYS_TIMER_RATE 1000000
#define CONFIG_SYS_TIMER_COUNTER \
--
2.4.6