[U-Boot] [PATCH 03/15][v3] imx: mmc: fsl_esdhc fix dcache issue

[Stefano Babic <sbabic@denx.de>]

Hi Adrian,

On 23/07/2015 00:24, Adrian Alonso wrote:
> DCIMVAC is upgraded to DCCIMVAC for the individual processor
> (Cortex-A7) that the DCIMVAC is executed on.
> 
> We should follow the linux dma follow. Before DMA read, first
> invalidate dcache then after DMA read, invalidate dcache again.
> 
> With the DMA direction DMA_FROM_DEVICE, the dcache need be
> invalidated again after the DMA completion. The reason is
> that we need explicity make sure the dcache been invalidated
> thus to get the DMA'ed memory correctly from the physical memory.
> Any cache-line fill during the DMA operations such as the
> pre-fetching can cause the DMA coherency issue, thus CPU get the stale data.
> 

Pen has already sent this patch:

	https://patchwork.ozlabs.org/patch/488273/

Please do not copy and resend patches that are already enqueded.
Instead, advise that your patches depend on some previous ones. Thanks.

Best regards,
Stefano Babic


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