From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Sun, 26 Jul 2015 16:05:21 +0200 Subject: [U-Boot] [PATCH 03/15][v3] imx: mmc: fsl_esdhc fix dcache issue In-Reply-To: <1437603903-2304-2-git-send-email-aalonso@freescale.com> References: <1437603903-2304-1-git-send-email-aalonso@freescale.com> <1437603903-2304-2-git-send-email-aalonso@freescale.com> Message-ID: <55B4E921.60209@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Adrian, On 23/07/2015 00:24, Adrian Alonso wrote: > DCIMVAC is upgraded to DCCIMVAC for the individual processor > (Cortex-A7) that the DCIMVAC is executed on. > > We should follow the linux dma follow. Before DMA read, first > invalidate dcache then after DMA read, invalidate dcache again. > > With the DMA direction DMA_FROM_DEVICE, the dcache need be > invalidated again after the DMA completion. The reason is > that we need explicity make sure the dcache been invalidated > thus to get the DMA'ed memory correctly from the physical memory. > Any cache-line fill during the DMA operations such as the > pre-fetching can cause the DMA coherency issue, thus CPU get the stale data. > Pen has already sent this patch: https://patchwork.ozlabs.org/patch/488273/ Please do not copy and resend patches that are already enqueded. Instead, advise that your patches depend on some previous ones. Thanks. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================