From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 28 Jul 2015 09:44:27 -0600 Subject: [U-Boot] [PATCH 3/3] ARM: tegra: Disable SPL and non-cached memory on 64-bit In-Reply-To: References: <1438019126-3498-1-git-send-email-swarren@wwwdotorg.org> <1438019126-3498-3-git-send-email-swarren@wwwdotorg.org> Message-ID: <55B7A35B.6000509@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/28/2015 09:33 AM, Simon Glass wrote: > Hi, > > On 27 July 2015 at 11:45, Stephen Warren wrote: >> From: Thierry Reding >> >> For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in >> AArch64 mode so that we don't need the SPL. Non-cached memory is not >> implemented (yet) for 64-bit ARM. >> >> Signed-off-by: Thierry Reding >> Signed-off-by: Tom Warren >> Signed-off-by: Stephen Warren >> --- >> include/configs/tegra-common.h | 4 ++++ >> 1 file changed, 4 insertions(+) > > What does start up the CPU? Is this something that will be implemented > in SPL later? At least initially, the plan is to use a separate bootloader on the boot CPU (was named AVP, but got renamed to BPMP lite in Tegra210). It's vaguely possible that U-Boot SPL support will exist in the future, but I'm not sure.