[U-Boot] [PATCH 000/172] socfpga: SPL and DDR init

Dinh Nguyen
2015-08-03T15:16:29Z

On 07/27/2015 03:49 PM, Marek Vasut wrote:
> This series fixes the SPL support on SoCFPGA and cleans up the DDR
> init code such that it is becoming remotely mainlinable. After this
> series, the SPL is capable of booting from both SD/MMC and QSPI NOR.
>
> There is still work to be done, but I'd like to start picking it up
> so it can land in 2015.10 . Reviews and comments are welcome.
>

Thank you so much for putting this series together! For the whole series:

Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>

Dinh