From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Fri, 31 Jul 2015 08:33:10 -0700 Subject: [U-Boot] [PATCH 1/4][v8] powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 In-Reply-To: <55BB9047.3070207@freescale.com> References: <1438331963-20482-1-git-send-email-aneesh.bansal@freescale.com> <55BB9047.3070207@freescale.com> Message-ID: <55BB9536.10306@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/31/2015 08:12 AM, York Sun wrote: > > > On 07/31/2015 01:39 AM, Aneesh Bansal wrote: >> Secure Boot Target is added for NAND for P3041. >> Changes: >> In PowerPC, the core begins execution from address 0xFFFFFFFC. >> In case of secure boot, this default address maps to Boot ROM. >> The Boot ROM code requires that the bootloader(U-boot) must lie >> in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. >> >> In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is >> configured as SRAM. U-Boot binary will be located on SRAM configured >> at address 0xBFF00000. >> In the U-Boot code, TLB entries are created to map the virtual address >> 0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM. >> >> Signed-off-by: Aneesh Bansal >> --- >> Changes in v8: >> New Patchset Created >> > > This change log doesn't have anything. Please put meaningful log for future > patches. You can try to use patman to ease the process. Actually this new version doesn't change _ANYTHING_, except adding a new patch to this set which should be separated anyway. Please do not send patches like these. York