From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Fri, 31 Jul 2015 08:52:15 -0700
Subject: [U-Boot] [PATCH 2/3][[v7] powerpc/mpc85xx: SECURE BOOT- NAND
 secure boot target for P5020 and P5040
In-Reply-To: <1434431190-25093-1-git-send-email-aneesh.bansal@freescale.com>
References: <1434431190-25093-1-git-send-email-aneesh.bansal@freescale.com>
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On 06/15/2015 10:06 PM, Aneesh Bansal wrote:
> Secure Boot Target is added for NAND for P5020 and P5040.
> The Secure boot target has already been added for P3041 by
> enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM.
> 
> The targets for P5020 and P5040 are added in the same manner.
> 
> Signed-off-by: Saksham Jain <saksham@freescale.com>
> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
> ---
> Changes in v7:
> Patchset created.
> TEXT BASE is defined as 0xFFF40000 as per new design.
> 

Applied to u-boot-mpc85xx master after adding CONFIG_SPI_FLASH to defconfig.

Thanks.

York