[U-Boot] [PATCH v3 03/15] imx: mx6ul: Update imx registers head file

[Stefano Babic <sbabic@denx.de>]

On 20/07/2015 20:39, Marek Vasut wrote:
> On Monday, July 20, 2015 at 01:28:23 PM, Peng Fan wrote:
>> 1. Update imx register base address for i.MX6UL.
>> 2. Remove duplicated MXS_APBH/GPMI/BCH_BASE.
>> 3. Remove #ifdef for register addresses that equal to
>>    "AIPS2_OFF_BASE_ADDR + 0x34000" for different chips.
>> 4. According fuse map, complete fuse_bank4_regs.
>> 5. Move AIPS3_ARB_BASE_ADDR and AIPS3_ARB_END_ADDR out of #ifdef
>> CONFIG_MX6SX, because we can use runtime check
>>
>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
> 
> [...]
> 
>> @@ -296,7 +300,6 @@
>>  #define AIPS3_CONFIG_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x7C000)
>>  #define ADC1_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0x80000)
>>  #define ADC2_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0x84000)
>> -#define WDOG3_BASE_ADDR             (AIPS3_ARB_BASE_ADDR + 0x88000)
>>  #define ECSPI5_BASE_ADDR            (AIPS3_ARB_BASE_ADDR + 0x8C000)
>>  #define HS_BASE_ADDR                (AIPS3_ARB_BASE_ADDR + 0x90000)
>>  #define MU_MCU_BASE_ADDR            (AIPS3_ARB_BASE_ADDR + 0x94000)
>> @@ -308,12 +311,17 @@
>>  #define PWM7_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xAC000)
>>  #define PWM8_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xB0000)
>>  #endif
>> +#define MX6SX_WDOG3_BASE_ADDR       (AIPS3_ARB_BASE_ADDR + 0x88000)
>> +
>> +/* only for i.MX6SX/UL */
>> +#define WDOG3_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL) ?	\
>> +			 MX6UL_WDOG3_BASE_ADDR :  MX6SX_WDOG3_BASE_ADDR)
> 
> Nitpick -- this should probably be protected by #ifndef __ASSELMBLY__ .
> 

Anyway, I decided to apply it - it could be easy fixed with a follow up
patch if this case arises.

Best regards,
Stefano Babic


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