From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Date: Mon, 3 Aug 2015 10:16:29 -0500 Subject: [U-Boot] [PATCH 000/172] socfpga: SPL and DDR init In-Reply-To: <1438030335-10631-1-git-send-email-marex@denx.de> References: <1438030335-10631-1-git-send-email-marex@denx.de> Message-ID: <55BF85CD.3030504@opensource.altera.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/27/2015 03:49 PM, Marek Vasut wrote: > This series fixes the SPL support on SoCFPGA and cleans up the DDR > init code such that it is becoming remotely mainlinable. After this > series, the SPL is capable of booting from both SD/MMC and QSPI NOR. > > There is still work to be done, but I'd like to start picking it up > so it can land in 2015.10 . Reviews and comments are welcome. > Thank you so much for putting this series together! For the whole series: Acked-by: Dinh Nguyen Dinh