[U-Boot] [Patch v2] lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef

[York Sun <yorksun@freescale.com>]

Sure. I have to rebase it anyway after this commit 5b34436.

York

On 08/02/2015 03:30 PM, Simon Glass wrote:
> Hi York,
> 
> On 23 July 2015 at 16:12, York Sun <yorksun@freescale.com> wrote:
>> fdt_addr_t is a physical address. It can be either 64-bit or 32-bit,
>> depending on the architecture. It should be phys_addr_t instead of
>> u64 or u32. Similarly, fdt_size_t is changed to phys_size_t.
>>
>> Signed-off-by: York Sun <yorksun@freescale.com>
>> CC: Simon Glass <sjg@chromium.org>
>> ---
>> Change log
>>  v2: Rebase code to latest master, add change to fsl_dspi.c.
> 
> Can you please put that change into a different patch? For both:
> 
> Reviewed-by: Simon Glass <sjg@chromium.org>
> 
>>
>>  drivers/spi/fsl_dspi.c |    4 ++--
>>  include/fdtdec.h       |    7 +++----
>>  lib/fdtdec.c           |    4 ++--
>>  3 files changed, 7 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
>> index 7928531..326f040 100644
>> --- a/drivers/spi/fsl_dspi.c
>> +++ b/drivers/spi/fsl_dspi.c
>> @@ -664,8 +664,8 @@ static int fsl_dspi_ofdata_to_platdata(struct udevice *bus)
>>         plat->speed_hz = fdtdec_get_int(blob,
>>                         node, "spi-max-frequency", FSL_DSPI_DEFAULT_SCK_FREQ);
>>
>> -       debug("DSPI: regs=0x%llx, max-frequency=%d, endianess=%s, num-cs=%d\n",
>> -             (u64)plat->regs_addr, plat->speed_hz,
>> +       debug("DSPI: regs=0x%pa, max-frequency=%d, endianess=%s, num-cs=%d\n",
>> +             &plat->regs_addr, plat->speed_hz,
>>               plat->flags & DSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le",
>>               plat->num_chipselect);
>>
>> diff --git a/include/fdtdec.h b/include/fdtdec.h
>> index 2323603..c61734c 100644
>> --- a/include/fdtdec.h
>> +++ b/include/fdtdec.h
>> @@ -14,6 +14,7 @@
>>   * changes to support FDT are minimized.
>>   */
>>
>> +#include <linux/types.h>
>>  #include <libfdt.h>
>>  #include <pci.h>
>>
>> @@ -21,15 +22,13 @@
>>   * A typedef for a physical address. Note that fdt data is always big
>>   * endian even on a litle endian machine.
>>   */
>> +typedef phys_addr_t fdt_addr_t;
>> +typedef phys_size_t fdt_size_t;
>>  #ifdef CONFIG_PHYS_64BIT
>> -typedef u64 fdt_addr_t;
>> -typedef u64 fdt_size_t;
>>  #define FDT_ADDR_T_NONE (-1ULL)
>>  #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
>>  #define fdt_size_to_cpu(reg) be64_to_cpu(reg)
>>  #else
>> -typedef u32 fdt_addr_t;
>> -typedef u32 fdt_size_t;
>>  #define FDT_ADDR_T_NONE (-1U)
>>  #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
>>  #define fdt_size_to_cpu(reg) be32_to_cpu(reg)
>> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
>> index 9c6b361..3ff8b66 100644
>> --- a/lib/fdtdec.c
>> +++ b/lib/fdtdec.c
>> @@ -102,8 +102,8 @@ fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
>>                         size = (fdt_size_t *)((char *)cell +
>>                                         sizeof(fdt_addr_t));
>>                         *sizep = fdt_size_to_cpu(*size);
>> -                       debug("addr=%08lx, size=%llx\n",
>> -                             (ulong)addr, (u64)*sizep);
>> +                       debug("addr=%pa, size=%llx\n",
>> +                             &addr, (u64)*sizep);
>>                 } else {
>>                         debug("%08lx\n", (ulong)addr);
>>                 }
>> --
>> 1.7.9.5
>>
> 
> Regards,
> Simon
>