public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 2/4] ARM: cache: add an empty stub function for invalidate/flush dcache
Date: Tue, 4 Aug 2015 08:30:42 -0700	[thread overview]
Message-ID: <55C0DAA2.7070303@freescale.com> (raw)
In-Reply-To: <1437968418-21319-3-git-send-email-josh.wu@atmel.com>



On 07/26/2015 08:40 PM, Josh Wu wrote:
> Since some driver like ohci, lcd used dcache functions. But some ARM
> cpu don't implement the invalidate_dcache_range()/flush_dcache_range()
> functions.
> 
> To avoid compiling errors this patch adds an weak empty stub function
> for all ARM cpu in arch/arm/lib/cache.c.
> And ARM cpu still can implemnt its own cache functions on the cpu folder.
> 
> Signed-off-by: Josh Wu <josh.wu@atmel.com>
> ---
> 
> Changes in v3:
> - remove the same functions in the cpu/ files as they will use the weak
>   function provided in lib/cache.c
> 
> Changes in v2:
> - new added.
> 
>  arch/arm/cpu/arm1136/cpu.c     | 8 --------
>  arch/arm/cpu/arm926ejs/cache.c | 8 --------
>  arch/arm/cpu/armv7/cache_v7.c  | 8 --------
>  arch/arm/cpu/armv8/cache_v8.c  | 8 --------
>  arch/arm/lib/cache.c           | 9 +++++++++
>  5 files changed, 9 insertions(+), 32 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c
> index a7aed4b..b4d1d54 100644
> --- a/arch/arm/cpu/arm1136/cpu.c
> +++ b/arch/arm/cpu/arm1136/cpu.c
> @@ -134,14 +134,6 @@ void flush_dcache_all(void)
>  {
>  }
>  
> -void invalidate_dcache_range(unsigned long start, unsigned long stop)
> -{
> -}
> -
> -void flush_dcache_range(unsigned long start, unsigned long stop)
> -{
> -}
> -
>  void flush_cache(unsigned long start, unsigned long size)
>  {
>  }
> diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
> index 8d7873c..99d1a13 100644
> --- a/arch/arm/cpu/arm926ejs/cache.c
> +++ b/arch/arm/cpu/arm926ejs/cache.c
> @@ -83,14 +83,6 @@ void flush_dcache_all(void)
>  {
>  }
>  
> -void invalidate_dcache_range(unsigned long start, unsigned long stop)
> -{
> -}
> -
> -void flush_dcache_range(unsigned long start, unsigned long stop)
> -{
> -}
> -
>  void flush_cache(unsigned long start, unsigned long size)
>  {
>  }
> diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
> index e8ee875..4f0e406 100644
> --- a/arch/arm/cpu/armv7/cache_v7.c
> +++ b/arch/arm/cpu/armv7/cache_v7.c
> @@ -304,14 +304,6 @@ void flush_dcache_all(void)
>  {
>  }
>  
> -void invalidate_dcache_range(unsigned long start, unsigned long stop)
> -{
> -}
> -
> -void flush_dcache_range(unsigned long start, unsigned long stop)
> -{
> -}
> -
>  void arm_init_before_mmu(void)
>  {
>  }
> diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
> index c5ec529..f8c17cc 100644
> --- a/arch/arm/cpu/armv8/cache_v8.c
> +++ b/arch/arm/cpu/armv8/cache_v8.c
> @@ -149,14 +149,6 @@ void flush_dcache_all(void)
>  {
>  }
>  
> -void invalidate_dcache_range(unsigned long start, unsigned long stop)
> -{
> -}
> -
> -void flush_dcache_range(unsigned long start, unsigned long stop)
> -{
> -}
> -
>  void dcache_enable(void)
>  {
>  }
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index 74cfde6..bc48f53 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -53,6 +53,15 @@ __weak void enable_caches(void)
>  	puts("WARNING: Caches not enabled\n");
>  }
>  
> +__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
> +{
> +	/* An empty stub, real implementation should be in platform code */
> +}
> +__weak void flush_dcache_range(unsigned long start, unsigned long stop)
> +{
> +	/* An empty stub, real implementation should be in platform code */
> +}
> +
>  #ifdef CONFIG_SYS_NONCACHED_MEMORY
>  /*
>   * Reserve one MMU section worth of address space below the malloc() area that
> 

Reviewed-by: York Sun <yorksun@freescale.com>

  parent reply	other threads:[~2015-08-04 15:30 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-27  3:40 [U-Boot] [PATCH v3 0/4] ARM & m68k: cache: add weak cache code then enable usb cache support Josh Wu
2015-07-27  3:40 ` [U-Boot] [PATCH v3 1/4] m68k: cache: add an empty stub functions for invalidate/flush dcache Josh Wu
2015-08-13 13:20   ` [U-Boot] [U-Boot, v3, " Tom Rini
2015-07-27  3:40 ` [U-Boot] [PATCH v3 2/4] ARM: cache: add an empty stub function " Josh Wu
2015-07-27 16:31   ` York Sun
2015-07-28  2:17     ` Josh Wu
2015-07-28  4:24       ` York Sun
2015-07-28  5:06         ` Josh Wu
2015-07-28  5:21           ` York Sun
2015-08-04  6:50             ` Josh Wu
2015-08-04 15:30   ` York Sun [this message]
2015-08-05  7:32     ` Josh Wu
2015-08-13 13:20   ` [U-Boot] [U-Boot, v3, " Tom Rini
2015-07-27  3:40 ` [U-Boot] [PATCH v3 3/4] ARM: cache: implement a default weak flush_cache() function Josh Wu
2015-08-13 13:20   ` [U-Boot] [U-Boot, v3, " Tom Rini
2015-07-27  3:40 ` [U-Boot] [PATCH v3 4/4] usb: ohci: enable cache support Josh Wu
2015-08-13 13:20   ` [U-Boot] [U-Boot,v3,4/4] " Tom Rini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=55C0DAA2.7070303@freescale.com \
    --to=yorksun@freescale.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox