From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] drivers/ddr/fsl: Adjust bstopre value
Date: Tue, 4 Aug 2015 08:57:43 -0700 [thread overview]
Message-ID: <55C0E0F7.7030209@freescale.com> (raw)
In-Reply-To: <1437685488-24756-1-git-send-email-yorksun@freescale.com>
On 07/23/2015 02:04 PM, York Sun wrote:
> By default the bstopre value has been set to 0x100, used to be 1/4
> value of refint. Modern DDR has increased the refresh time. Adjust
> to 1/4 of refresh interval dynamically. Individual board can still
> override this value in board ddr file, or to use auto-precharge.
>
> Signed-off-by: York Sun <yorksun@freescale.com>
> ---
Applied to u-boot-fsl-qoriq master.
York
prev parent reply other threads:[~2015-08-04 15:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-23 21:04 [U-Boot] [PATCH] drivers/ddr/fsl: Adjust bstopre value York Sun
2015-08-04 15:57 ` York Sun [this message]
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