From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Tue, 4 Aug 2015 08:57:43 -0700 Subject: [U-Boot] [PATCH] drivers/ddr/fsl: Adjust bstopre value In-Reply-To: <1437685488-24756-1-git-send-email-yorksun@freescale.com> References: <1437685488-24756-1-git-send-email-yorksun@freescale.com> Message-ID: <55C0E0F7.7030209@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/23/2015 02:04 PM, York Sun wrote: > By default the bstopre value has been set to 0x100, used to be 1/4 > value of refint. Modern DDR has increased the refresh time. Adjust > to 1/4 of refresh interval dynamically. Individual board can still > override this value in board ddr file, or to use auto-precharge. > > Signed-off-by: York Sun > --- Applied to u-boot-fsl-qoriq master. York