From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Tue, 4 Aug 2015 08:58:22 -0700 Subject: [U-Boot] [PATCH 1/4][v2] config: lsch3: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A In-Reply-To: <1435318161-12160-1-git-send-email-nikhil.badola@freescale.com> References: <1435318161-12160-1-git-send-email-nikhil.badola@freescale.com> Message-ID: <55C0E11E.4030301@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 06/26/2015 04:29 AM, Nikhil Badola wrote: > Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by > USB XHCI stack for alignment > > Signed-off-by: Nikhil Badola > --- > changes for v2 : None > Applied to u-boot-fsl-qoriq master with minor change in subject. Thanks. York