From mboxrd@z Thu Jan  1 00:00:00 1970
From: Nikolay Dimitrov <picmaster@mail.bg>
Date: Thu, 06 Aug 2015 10:39:24 +0300
Subject: [U-Boot] [PATCH 2/4] net: fec: do not access reserved register
 for i.MX6UL
In-Reply-To: <20150806044121.GA20898@shlinux2>
References: <1438596380-4632-1-git-send-email-Peng.Fan@freescale.com>
 <1438596380-4632-2-git-send-email-Peng.Fan@freescale.com>
 <55C21E3F.2040604@mail.bg> <20150806044121.GA20898@shlinux2>
Message-ID: <55C30F2C.4040600@mail.bg>
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To: u-boot@lists.denx.de

Hi Peng,

On 08/06/2015 07:41 AM, Peng Fan wrote:
> Hi Nikolay,
> On Wed, Aug 05, 2015 at 05:31:27PM +0300, Nikolay Dimitrov wrote:
>> Hi Peng,
>>
>> On 08/03/2015 01:06 PM, Peng Fan wrote:
>>> The MIB RAM and FIFO receive start register does not exist on
>>> i.MX6UL. Accessing these register will cause enet not work well.
>>>
>>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>>> Signed-off-by: Fugang Duan <B38611@freescale.com>
>>> Cc: Joe Hershberger <joe.hershberger@ni.com>
>>> ---
>>>   drivers/net/fec_mxc.c | 4 ++++
>>>   1 file changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
>>> index c5dcbbb..7fb1d5f 100644
>>> --- a/drivers/net/fec_mxc.c
>>> +++ b/drivers/net/fec_mxc.c
>>> @@ -520,8 +520,10 @@ static int fec_open(struct eth_device *edev)
>>>   static int fec_init(struct eth_device *dev, bd_t* bd)
>>>   {
>>>   	struct fec_priv *fec = (struct fec_priv *)dev->priv;
>>> +#if !defined(CONFIG_MX6UL)
>>>   	uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop;
>>>   	int i;
>>> +#endif
>>>
>>>   	/* Initialize MAC address */
>>>   	fec_set_hwaddr(dev);
>>> @@ -551,12 +553,14 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
>>>   	writel(0x00000000, &fec->eth->gaddr2);
>>>
>>>
>>> +#if !defined(CONFIG_MX6UL)
>>>   	/* clear MIB RAM */
>>>   	for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
>>>   		writel(0, i);
>>>
>>>   	/* FIFO receive start register */
>>>   	writel(0x520, &fec->eth->r_fstart);
>>> +#endif
>>>
>>>   	/* size and address of each buffer */
>>>   	writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr);
>>>
>>
>> Is it possible to do runtime check for the SoC type, instead of ifdefs?
>
> This driver is used by i.MX7 and i.MX6, but i.MX7 patchset has not been
> upstreamed now.
>
> I considered using "if (!is_cpu_type(MXC_CPU_MX6UL))", but this will cause
> i.MX7 fail to complile successfully, because i.MX7 does not support the macro
> MXC_CPU_MX6UL.
>
> The way I can think out is to refactor the code to support DM or FDT,
> using compatible string to figure out which SoC. But now I do not have
> much time to refactor the driver. So I just use the "#if !defined" way
> which is not good solution.

Thanks for explaining. Please check this code:


#ifdef CONFIG_MX6
     if (!is_cpu_type(MXC_CPU_MX6UL))
#endif
     {
         /* soc-specific code here */
     }


This code will allow runtime detection for imx6 socs, and will not
break the imx7 builds. What do you think?

Regards,
Nikolay